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marigold: add customize battery cmd for GRL
for GRL verify add customize battery cmd 0x4F byte[0] = reg, 0x0 for batt cap, 0x1 for batt status Change-Id: Ia4e4c8fbf60a7f280c8539b7f7e2c8ac18bdc160 Signed-off-by: LeoCX_Tsai <LeoCX_Tsai@compal.com>
1 parent 7f3818e commit 032825a

5 files changed

Lines changed: 238 additions & 5 deletions

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zephyr/program/framework/Kconfig

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -96,12 +96,28 @@ config PD_CCG6_WAIT_STABLE_TIMER
9696
EC should wait X ms the PD chip run in stable mode then start to
9797
communicate.
9898

99+
config PD_CCG6_CUSTOMIZE_BATT_MESSAGE
100+
bool "Enable CCG6 Customize battery response"
101+
default n
102+
depends on PD_CHIP_CCG6
103+
help
104+
Enable customize battery response for GRL test, EC will write specific
105+
register 0x4f to PD for GET_BATTERY_CAP and GET_BATTERY_STATUS.
106+
99107
config PD_COMMON_VBUS_CONTROL
100108
bool "Enable CCG common vbus control"
101109
help
102110
Enable Cypress CCG common vbus control, if not enable please modify
103111
board_set_active_charge_port at board for customize vbus control.
104112

113+
config PD_COMMON_EXTENDED_MESSAGE
114+
bool "Enable CCG common extended message"
115+
default n
116+
help
117+
Enable Cypress CCG common extended message, if we need send message to PD
118+
please add the response for extended message.
119+
ex: get battery status or capability.
120+
105121
config PLATFORM_SIMPLE_VERSION_SHIFT_IDX
106122
int "Shift idx for return commit id to BIOS"
107123
default 18

zephyr/program/framework/include/cypress_pd_common.h

Lines changed: 51 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,9 @@
2020
#define CCG_I2C_CHIP1 0x40
2121
#endif
2222

23+
#define PRODUCT_ID CONFIG_PD_USB_PID
24+
#define VENDOR_ID 0x32ac
25+
2326
#define BB_PWR_DOWN_TIMEOUT (4000*MSEC)
2427

2528
/*
@@ -57,6 +60,9 @@
5760
#define CCG_DPM_CMD_REG 0x004C
5861
#define CCG_MUX_CFG_REG 0x004D
5962
#define CCG_DEINIT_PORT_REG 0x004E
63+
#ifdef CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE
64+
#define CCG_BATTERT_STATE 0x004F
65+
#endif /* CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE */
6066
#endif
6167
#define CCG_ICL_STS_REG 0x0042
6268
#define CCG_ICL_BB_RETIMER_CMD_REG 0x0046
@@ -225,6 +231,13 @@
225231
#ifdef CONFIG_PD_CHIP_CCG6
226232
#define CCG6_AC_AT_PORT 0xC4
227233
#define CCG_ICL_CTRL_REG 0x0040
234+
235+
#ifdef CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE
236+
#define CCG6_BATT_IS_PRESENT BIT(1)
237+
#define CCG6_BATT_IS_DISCHARGING BIT(2)
238+
#define CCG6_BATT_IS_IDLE BIT(3)
239+
#endif /* CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE */
240+
228241
#endif
229242

230243
/************************************************/
@@ -526,6 +539,30 @@ struct pd_chip_ucsi_info_t {
526539
int wait_ack;
527540
};
528541

542+
#ifdef CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE
543+
544+
/**
545+
* follow CCG6 vendor Format
546+
* byte[0] - reg, 0x0 = batt_cap, 0x01 = batt_status.
547+
* ohters byte follow PD Spec format
548+
*/
549+
struct pd_battery_cap_t {
550+
uint8_t reg;
551+
uint16_t vid;
552+
uint16_t pid;
553+
uint16_t design_cap;
554+
uint16_t last_full_cap;
555+
uint8_t battery_type;
556+
} __packed;
557+
558+
struct pd_battery_status_t {
559+
uint8_t reg;
560+
uint8_t reserved;
561+
uint8_t battery_info;
562+
uint16_t batt_present_cap;
563+
} __packed;
564+
#endif /* CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE */
565+
529566
/**
530567
* extern struct for ccg6 or ccg8 use.
531568
*/
@@ -543,6 +580,7 @@ extern struct pd_port_current_state_t pd_port_states[];
543580
*/
544581
int cypd_write_reg8(int controller, int reg, int data);
545582
int cypd_write_reg16(int controller, int reg, int data);
583+
int cypd_write8_reg_block(int controller, int reg, void *data, int len);
546584
int cypd_write_reg_block(int controller, int reg, void *data, int len);
547585

548586
/**
@@ -679,6 +717,19 @@ int cypd_reconnect_port_enable(int controller);
679717
void cypd_reconnect(void);
680718

681719
#endif /* CONFIG_PD_CCG6_ERROR_RECOVERY */
720+
721+
#ifdef CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE
722+
/**
723+
* Set battery_cap info to PD
724+
*/
725+
void cypd_customize_battery_cap(void);
726+
727+
/**
728+
* Set battery_status info to PD
729+
*/
730+
void cypd_customize_battery_status(void);
731+
#endif /* CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE */
732+
682733
#endif /* CONFIG_PD_CHIP_CCG6 */
683734

684735
/**

zephyr/program/framework/marigold/project.conf

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@ CONFIG_THIRD_PARTY_CUSTOMIZED_DESIGN=y
3838
CONFIG_CHIPSET_INTEL=y
3939
CONFIG_PD_CHIP_CCG6=y
4040
CONFIG_PD_CCG6_WAIT_STABLE_TIMER=415
41+
CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE=y
4142

4243
# PECI
4344
CONFIG_PECI=y

zephyr/program/framework/src/cypd_ccg6.c

Lines changed: 139 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -552,3 +552,142 @@ int check_tbt_mode(int controller)
552552

553553
return data;
554554
}
555+
556+
#ifdef CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE
557+
/*****************************************************************
558+
* Customize response battery status
559+
****************************************************************/
560+
561+
static struct pd_battery_cap_t pd_battery_cap;
562+
static struct pd_battery_status_t pd_battery_status;
563+
static int pd_batt_soc;
564+
bool cypd_batt_update;
565+
566+
void cypd_customize_battery_cap(void)
567+
{
568+
int i;
569+
uint32_t c, v;
570+
bool battery_can_discharge = (battery_is_present() == BP_YES) &
571+
battery_get_disconnect_state();
572+
573+
/* only send status when PD ready */
574+
if (!(pd_chip_config[0].state == CCG_STATE_READY &&
575+
pd_chip_config[1].state == CCG_STATE_READY)) {
576+
return;
577+
}
578+
579+
if (!battery_can_discharge) {
580+
cypd_batt_update = false;
581+
pd_battery_cap.design_cap = 0x0000;
582+
pd_battery_cap.last_full_cap = 0x0000;
583+
pd_battery_cap.battery_type = 0x1;
584+
585+
} else {
586+
cypd_batt_update = true;
587+
pd_battery_cap.reg = 0;
588+
pd_battery_cap.vid = VENDOR_ID;
589+
pd_battery_cap.pid = PRODUCT_ID;
590+
pd_battery_cap.battery_type = 0x0;
591+
592+
if (battery_design_voltage(&v) == 0) {
593+
if (battery_design_capacity(&c) == 0) {
594+
/*
595+
* Wh = (c * v) / 1000000
596+
* 10th of a Wh = Wh * 10
597+
*/
598+
pd_battery_cap.design_cap = DIV_ROUND_NEAREST((c * v),
599+
100000);
600+
}
601+
if (battery_full_charge_capacity(&c) == 0) {
602+
/*
603+
* Wh = (c * v) / 1000000
604+
* 10th of a Wh = Wh * 10
605+
*/
606+
pd_battery_cap.last_full_cap = DIV_ROUND_NEAREST((c * v),
607+
100000);
608+
}
609+
}
610+
}
611+
612+
for (i = 0; i < PD_CHIP_COUNT; i++)
613+
cypd_write8_reg_block(i, CCG_BATTERT_STATE,
614+
&pd_battery_cap, sizeof(pd_battery_cap));
615+
616+
}
617+
618+
void cypd_customize_battery_status(void)
619+
{
620+
int i, soc_wh;
621+
uint8_t batt_info;
622+
uint32_t c, v;
623+
struct batt_params batt;
624+
bool battery_can_discharge = (battery_is_present() == BP_YES) &
625+
battery_get_disconnect_state();
626+
627+
battery_get_params(&batt);
628+
629+
/* only send status when PD ready */
630+
if (!(pd_chip_config[0].state == CCG_STATE_READY &&
631+
pd_chip_config[1].state == CCG_STATE_READY)) {
632+
return;
633+
}
634+
635+
/* only update data when soc change */
636+
if (batt.state_of_charge == pd_batt_soc)
637+
return;
638+
639+
pd_batt_soc = batt.state_of_charge;
640+
641+
if (!battery_can_discharge) {
642+
643+
pd_battery_status.reg = 0x1;
644+
pd_battery_status.battery_info = 0;
645+
pd_battery_status.batt_present_cap = 0xFFFF;
646+
647+
} else {
648+
649+
/**
650+
* if battery didn't set cap info at first time pd init
651+
* need set again when battery ready.
652+
* ex: resume from dead battery, or ac only boot and then plug-in batt
653+
*/
654+
if (!cypd_batt_update)
655+
cypd_customize_battery_cap();
656+
657+
if (battery_design_voltage(&v) == 0) {
658+
if (battery_remaining_capacity(&c) == 0) {
659+
/*
660+
* Wh = (c * v) / 1000000
661+
* 10th of a Wh = Wh * 10
662+
*/
663+
soc_wh = DIV_ROUND_NEAREST((c * v), 100000);
664+
}
665+
}
666+
667+
if (battery_status(&c) != 0) {
668+
batt_info = 0; /* batt not present */
669+
} else {
670+
if (c & STATUS_FULLY_CHARGED)
671+
/* Fully charged */
672+
batt_info = CCG6_BATT_IS_IDLE | CCG6_BATT_IS_PRESENT;
673+
else if (c & STATUS_DISCHARGING)
674+
/* Discharging */
675+
batt_info = CCG6_BATT_IS_DISCHARGING | CCG6_BATT_IS_PRESENT;
676+
else
677+
/* else battery is charging.*/
678+
batt_info = CCG6_BATT_IS_PRESENT;
679+
}
680+
681+
pd_battery_status.reg = 0x1;
682+
pd_battery_status.battery_info = batt_info;
683+
pd_battery_status.batt_present_cap = soc_wh;
684+
}
685+
686+
for (i = 0; i < PD_CHIP_COUNT; i++)
687+
cypd_write8_reg_block(i, CCG_BATTERT_STATE,
688+
&pd_battery_status, sizeof(pd_battery_status));
689+
690+
}
691+
DECLARE_HOOK(HOOK_AC_CHANGE, cypd_customize_battery_status, HOOK_PRIO_DEFAULT);
692+
DECLARE_HOOK(HOOK_BATTERY_SOC_CHANGE, cypd_customize_battery_status, HOOK_PRIO_DEFAULT);
693+
#endif /* CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE */

zephyr/program/framework/src/cypress_pd_common.c

Lines changed: 31 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -37,10 +37,6 @@
3737
#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args)
3838
#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args)
3939

40-
41-
#define PRODUCT_ID CONFIG_PD_USB_PID
42-
#define VENDOR_ID 0x32ac
43-
4440
#undef CCG_INIT_STATE
4541
#ifdef CONFIG_PD_CHIP_CCG6
4642
#define CCG_INIT_STATE CCG_STATE_WAIT_STABLE
@@ -116,6 +112,18 @@ int cypd_write_reg_block(int controller, int reg, void *data, int len)
116112
return rv;
117113
}
118114

115+
int cypd_write8_reg_block(int controller, int reg, void *data, int len)
116+
{
117+
int rv;
118+
uint16_t i2c_port = pd_chip_config[controller].i2c_port;
119+
uint16_t addr_flags = pd_chip_config[controller].addr_flags;
120+
121+
rv = i2c_write_block(i2c_port, addr_flags, reg, data, len);
122+
if (rv != EC_SUCCESS)
123+
CPRINTS("%s failed: ctrl=0x%x, reg=0x%02x", __func__, controller, reg);
124+
return rv;
125+
}
126+
119127
int cypd_write_reg16(int controller, int reg, int data)
120128
{
121129
int rv;
@@ -687,6 +695,7 @@ static void cypd_ppm_port_clear(void)
687695
hook_call_deferred(&pdo_init_deferred_data, 1);
688696
}
689697

698+
#ifdef CONFIG_PD_COMMON_EXTENDED_MESSAGE
690699
/*
691700
* send a message using DM_CONTROL to port partner
692701
* pd_header is using chromium PD header with upper bits defining SOP type
@@ -745,6 +754,7 @@ void cypd_send_msg(int controller, int port, uint32_t pd_header, uint16_t ext_hd
745754
cypd_write_reg16(controller, CCG_DM_CONTROL_REG(port), dm_control_data);
746755
}
747756

757+
748758
void cypd_response_get_battery_capability(int controller, int port,
749759
uint32_t pd_header, enum tcpci_msg_type sop_type)
750760
{
@@ -942,6 +952,7 @@ int cypd_handle_extend_msg(int controller, int port, int len, enum tcpci_msg_typ
942952

943953
return rv;
944954
}
955+
#endif
945956

946957
static void clear_port_state(int controller, int port)
947958
{
@@ -1194,6 +1205,15 @@ __overridable void cypd_customize_app_setup(int controller)
11941205
*/
11951206
}
11961207

1208+
#ifdef CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE
1209+
static void pd_batt_init_deferred(void)
1210+
{
1211+
cypd_customize_battery_cap();
1212+
cypd_customize_battery_status();
1213+
}
1214+
DECLARE_DEFERRED(pd_batt_init_deferred);
1215+
#endif /* CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE */
1216+
11971217
static void cypd_handle_state(int controller)
11981218
{
11991219
int data;
@@ -1259,8 +1279,12 @@ static void cypd_handle_state(int controller)
12591279
gpio_enable_interrupt(pd_chip_config[controller].gpio);
12601280

12611281
/* Update PDO format after init complete */
1262-
if (controller)
1282+
if (controller) {
1283+
#ifdef CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE
1284+
hook_call_deferred(&pd_batt_init_deferred_data, 100 * MSEC);
1285+
#endif /* CONFIG_PD_CCG6_CUSTOMIZE_BATT_MESSAGE */
12631286
hook_call_deferred(&pdo_init_deferred_data, 25 * MSEC);
1287+
}
12641288

12651289
CPRINTS("CYPD %d Ready!", controller);
12661290
pd_chip_config[controller].state = CCG_STATE_READY;
@@ -1629,8 +1653,10 @@ void cypd_port_int(int controller, int port)
16291653
sop_type = TCPCI_MSG_SOP_PRIME;
16301654
else if (data2[0] == CCG_RESPONSE_EXT_MSG_SOP_RX)
16311655
sop_type = TCPCI_MSG_SOP_PRIME_PRIME;
1656+
#ifdef CONFIG_PD_COMMON_EXTENDED_MESSAGE
16321657
cypd_handle_extend_msg(controller, port, response_len, sop_type);
16331658
CPRINTS("CYP_RESPONSE_RX_EXT_MSG");
1659+
#endif /* CONFIG_PD_COMMON_EXTENDED_MESSAGE */
16341660
break;
16351661
case CCG_RESPONSE_VDM_RX:
16361662
i2c_read_offset16_block(i2c_port, addr_flags,

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