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Iris: add wdt for clock stuck
when the RTC power domain comes up later than the EC ALW power domain will cause PLL lock never stable also make EC stuck in while add wdt to reset EC lfw again timeout default follow CONFIG_WATCHDOG_PERIOD_MS(1.6s) Signed-off-by: LeoCX_Tsai <LeoCX_Tsai@compal.com>
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chip/mchp/lfw/ec_lfw.c

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -353,6 +353,37 @@ enum ec_image system_get_image_copy(void)
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return MCHP_VBAT_RAM(MCHP_IMAGETYPE_IDX);
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}
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/**
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* lfw wdt
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* this function is for RTC power fail are not stable
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* when the RTC power domain comes up later than the EC ALW power domain
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* will cause PLL lock never stable also make EC stuck in while
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* add wdt to reset EC lfw again
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* timeout default follow CONFIG_WATCHDOG_PERIOD_MS(1.6s)
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*/
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void lfw_wdt(void)
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{
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/* Clear WDT PCR sleep enable */
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MCHP_PCR_SLP_DIS_DEV(MCHP_PCR_WDT);
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/* Set timeout. It takes 1007us to decrement WDG_CNT by 1. */
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MCHP_WDG_LOAD = CONFIG_WATCHDOG_PERIOD_MS * 1000 / 1007;
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/* start watchdog */
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MCHP_WDG_CTL |= 1;
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/* Reload watchdog */
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MCHP_WDG_KICK = 1;
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}
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void lfw_wdt_stop(void)
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{
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/* Stop watchdog */
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MCHP_WDG_CTL &= ~1;
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/* Reload watchdog */
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MCHP_WDG_KICK = 1;
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}
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/*
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* lfw_main is entered by MEC BootROM or EC_RO/RW calling it directly.
@@ -404,7 +435,9 @@ void lfw_main(void)
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trace0(0, LFW, 0, "LFW first trace");
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timer_init();
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lfw_wdt();
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clock_init();
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lfw_wdt_stop();
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cpu_init();
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dma_init();
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uart_init();

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