fwk: disable deep sleep when the system run at S0 state. (#1064)

Follow the power/amd_x86.c disable the deep sleep when the system in S0
and enable the deep sleep when the system enter S3/S0ix.

Signed-off-by: Josh-Tsai <josh_tsai@compal.com>

Author: Josh-Tsai

zephyr/program/lotus/azalea/src/power_sequence.c

@@ -439,6 +439,12 @@ enum power_state power_handle_state(enum power_state state)
 		/* Call hooks now that rails are up */
 		hook_notify(HOOK_CHIPSET_RESUME);
 
+		/*
+		 * Disable idle task deep sleep. This means that the low
+		 * power idle task will not go into deep sleep while in S0.
+		 */
+		disable_sleep(SLEEP_MASK_AP_RUN);
+
 		/* set the PD chip system power state "S0" */
 		cypd_set_power_active();
 
@@ -503,6 +509,13 @@ enum power_state power_handle_state(enum power_state state)
 		lpc_s0ix_resume_restore_masks();
 		/* Call hooks now that rails are up */
 		hook_notify(HOOK_CHIPSET_RESUME);
+
+		/*
+		 * Disable idle task deep sleep. This means that the low
+		 * power idle task will not go into deep sleep while in S0.
+		 */
+		disable_sleep(SLEEP_MASK_AP_RUN);
+
 		CPRINTS("PH S0ixS0->S0");
 		return POWER_S0;
 
@@ -515,6 +528,13 @@ enum power_state power_handle_state(enum power_state state)
 		lpc_s0ix_suspend_clear_masks();
 		/* Call hooks before we remove power rails */
 		hook_notify(HOOK_CHIPSET_SUSPEND);
+
+		/*
+		 * Enable idle task deep sleep. Allow the low power idle task
+		 * to go into deep sleep in S3 or lower.
+		 */
+		enable_sleep(SLEEP_MASK_AP_RUN);
+
 		CPRINTS("PH S0S0ix->S0ix");
 		return POWER_S0ix;
 
@@ -533,6 +553,12 @@ enum power_state power_handle_state(enum power_state state)
 		/* Call hooks before we remove power rails */
 		hook_notify(HOOK_CHIPSET_SUSPEND);
 
+		/*
+		 * Enable idle task deep sleep. Allow the low power idle task
+		 * to go into deep sleep in S3 or lower.
+		 */
+		enable_sleep(SLEEP_MASK_AP_RUN);
+
 		/* set the PD chip system power state "S3" */
 		cypd_set_power_active();
 		return POWER_S3;

zephyr/program/lotus/lotus/src/power_sequence.c

@@ -544,6 +544,12 @@ enum power_state power_handle_state(enum power_state state)
 		hook_notify(HOOK_CHIPSET_RESUME);
 		peripheral_power_resume();
 
+		/*
+		 * Disable idle task deep sleep. This means that the low
+		 * power idle task will not go into deep sleep while in S0.
+		 */
+		disable_sleep(SLEEP_MASK_AP_RUN);
+
 		/* set the PD chip system power state "S0" */
 		cypd_set_power_active();
 
@@ -610,6 +616,13 @@ enum power_state power_handle_state(enum power_state state)
 
 		lpc_s0ix_resume_restore_masks();
 		hook_notify(HOOK_CHIPSET_RESUME);
+
+		/*
+		 * Disable idle task deep sleep. This means that the low
+		 * power idle task will not go into deep sleep while in S0.
+		 */
+		disable_sleep(SLEEP_MASK_AP_RUN);
+
 		return POWER_S0;
 
 		break;
@@ -619,6 +632,13 @@ enum power_state power_handle_state(enum power_state state)
 		system_in_s0ix = 1;
 		lpc_s0ix_suspend_clear_masks();
 		hook_notify(HOOK_CHIPSET_SUSPEND);
+
+		/*
+		 * Enable idle task deep sleep. Allow the low power idle task
+		 * to go into deep sleep in S3 or lower.
+		 */
+		enable_sleep(SLEEP_MASK_AP_RUN);
+
 		return POWER_S0ix;
 
 		break;
@@ -636,6 +656,12 @@ enum power_state power_handle_state(enum power_state state)
 		hook_notify(HOOK_CHIPSET_SUSPEND);
 		peripheral_power_suspend();
 
+		/*
+		 * Enable idle task deep sleep. Allow the low power idle task
+		 * to go into deep sleep in S3 or lower.
+		 */
+		enable_sleep(SLEEP_MASK_AP_RUN);
+
 		/* set the PD chip system power state "S3" */
 		cypd_set_power_active();
 		return POWER_S3;