@@ -1282,21 +1282,22 @@ void cypd_interrupt_handler_task(void *p)
12821282
12831283 if (evt & CYPD_EVT_PORT_DISABLE ) {
12841284 CPRINTS ("CYPD_EVT_PORT_DISABLE" );
1285- cypd_reconnect_port_disable (0 , 0 );
1286- cypd_reconnect_port_disable (1 , 0 );
1287- cypd_reconnect_port_disable (0 , 1 );
1288- cypd_reconnect_port_disable (1 , 1 );
1289- events = task_wait_event_mask (TASK_EVENT_TIMER , 300 * MSEC );
1285+ cypd_reconnect_port_disable (0 );
1286+ cypd_reconnect_port_disable (1 );
1287+ /*
1288+ * In the specification section 4.2.3.14, stopping an active
1289+ * PD port can take a long time (~1 second) in case VBus is
1290+ * being provided andneeds to be discharged
1291+ */
1292+ events = task_wait_event_mask (TASK_EVENT_TIMER , 1000 * MSEC );
12901293 if (events & TASK_EVENT_TIMER )
12911294 cypd_enque_evt (CYPD_EVT_PORT_ENABLE , 0 );
12921295 }
12931296
12941297 if (evt & CYPD_EVT_PORT_ENABLE ) {
12951298 CPRINTS ("CYPD_EVT_PORT_ENABLE" );
1296- cypd_reconnect_port_enable (0 , 0 );
1297- cypd_reconnect_port_enable (1 , 0 );
1298- cypd_reconnect_port_enable (0 , 1 );
1299- cypd_reconnect_port_enable (1 , 1 );
1299+ cypd_reconnect_port_enable (0 );
1300+ cypd_reconnect_port_enable (1 );
13001301 }
13011302
13021303 if (evt & CYPD_EVT_S_CHANGE ) {
@@ -1340,64 +1341,52 @@ void cypd_interrupt_handler_task(void *p)
13401341 }
13411342}
13421343
1343- int cypd_reconnect_port_disable (int controller , int port )
1344+ int cypd_reconnect_port_disable (int controller )
13441345{
13451346 int rv ;
13461347 uint8_t pd_status_reg [4 ];
1347- int port_pd_state , port_power_role , data ;
1348+ int port_power_role ;
1349+ int portEnable = 0 ; /* default disable all port*/
13481350
1349- rv = cypd_read_reg_block (controller , CYP5525_PD_STATUS_REG (port ), pd_status_reg , 4 );
1351+ /* check the first port's status */
1352+ rv = cypd_read_reg_block (controller , CYP5525_PD_STATUS_REG (0 ), pd_status_reg , 4 );
13501353 if (rv != EC_SUCCESS )
13511354 CPRINTS ("CYP5525_PD_STATUS_REG failed" );
13521355
1353- port_pd_state = pd_status_reg [1 ] & BIT (2 );
13541356 port_power_role = pd_status_reg [1 ] & BIT (0 );
1357+ /* Does not disable the source port */
1358+ if (port_power_role == PD_ROLE_SINK && (pd_status_reg [1 ] & BIT (2 )) == BIT (2 ))
1359+ portEnable |= BIT (0 );
13551360
1356- if (port_power_role == PD_ROLE_SINK && port_pd_state )
1357- return EC_SUCCESS ;
1358-
1359- rv = cypd_read_reg8 (controller , CYP5525_PDPORT_ENABLE_REG , & data );
1361+ /* check the second port's status */
1362+ rv = cypd_read_reg_block (controller , CYP5525_PD_STATUS_REG (1 ), pd_status_reg , 4 );
13601363 if (rv != EC_SUCCESS )
1361- return rv ;
1364+ CPRINTS ("CYP5525_PD_STATUS_REG failed" );
1365+
1366+ port_power_role = pd_status_reg [1 ] & BIT (0 );
1367+ /* Does not disable the source port */
1368+ if (port_power_role == PD_ROLE_SINK && (pd_status_reg [1 ] & BIT (2 )) == BIT (2 ))
1369+ portEnable |= BIT (1 );
13621370
1363- data &= ~BIT (port );
13641371
1365- rv = cypd_write_reg8 (controller , CYP5525_PDPORT_ENABLE_REG , data );
1372+ rv = cypd_write_reg8 (controller , CYP5525_PDPORT_ENABLE_REG , portEnable );
13661373 if (rv != EC_SUCCESS )
13671374 return rv ;
13681375
1369- CPRINTS ("disable controller: %d, Port: %d " , controller , port );
1376+ CPRINTS ("disable controller: %d, Port: 0x%02x " , controller , portEnable );
13701377
13711378 return rv ;
13721379}
13731380
1374- int cypd_reconnect_port_enable (int controller , int port )
1381+ int cypd_reconnect_port_enable (int controller )
13751382{
13761383 int rv ;
1377- uint8_t pd_status_reg [4 ];
1378- int port_pd_state , port_power_role , data ;
1379-
1380- rv = cypd_read_reg_block (controller , CYP5525_PD_STATUS_REG (port ), pd_status_reg , 4 );
1381- if (rv != EC_SUCCESS )
1382- CPRINTS ("CYP5525_PD_STATUS_REG failed" );
1383-
1384- port_pd_state = pd_status_reg [1 ] & BIT (2 );
1385- port_power_role = pd_status_reg [1 ] & BIT (0 );
1386-
1387- if (port_power_role == PD_ROLE_SINK && port_pd_state )
1388- return EC_SUCCESS ;
1389-
1390- rv = cypd_read_reg8 (controller , CYP5525_PDPORT_ENABLE_REG , & data );
1391- if (rv != EC_SUCCESS )
1392- return rv ;
1393-
1394- data |= BIT (port );
13951384
1396- rv = cypd_write_reg8 (controller , CYP5525_PDPORT_ENABLE_REG , data );
1385+ rv = cypd_write_reg8 (controller , CYP5525_PDPORT_ENABLE_REG , 3 );
13971386 if (rv != EC_SUCCESS )
13981387 return rv ;
13991388
1400- CPRINTS ("enable controller: %d, Port: %d " , controller , port );
1389+ CPRINTS ("enable controller: %d" , controller );
14011390
14021391 return rv ;
14031392}
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