[bsp][redv] formatting

Author: luhuadong

bsp/sparkfun-redv/applications/led/led.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -56,4 +56,4 @@ void led_set(rt_uint8_t val)
 void led_toggle(void)
 {
     _led_toggle(USER_LED_OFFSET);
-}
+}

bsp/sparkfun-redv/applications/led/led.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/sparkfun-redv/applications/main.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -14,7 +14,7 @@
 int main(void)
 {
     rt_kprintf("Hello, World!\n");
-    
+
     led_init();
 
     while (1)
@@ -60,4 +60,4 @@ static void give_me_five(void)
 }
 #ifdef FINSH_USING_MSH
 MSH_CMD_EXPORT(give_me_five, Show the SiFive logo)
-#endif
+#endif

bsp/sparkfun-redv/drivers/drv_usart.c

@@ -37,7 +37,7 @@ static rt_err_t usart_configure(struct rt_serial_device *serial,
 {
     RT_ASSERT(serial != RT_NULL);
     RT_ASSERT(cfg != RT_NULL);
- 
+
     GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
     GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
 

bsp/sparkfun-redv/drivers/interrupt.c

@@ -62,13 +62,13 @@ rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector, void *param)
 void rt_hw_interrupt_init(void)
 {
     int idx;
-    
+
     /*  config interrupt vector*/
     asm volatile(
         "la t0, trap_entry\n"
         "csrw mtvec, t0"
     );
-    
+
     /*  enable global interrupt*/
     PLIC_init(&g_plic,
             PLIC_CTRL_ADDR,
@@ -86,8 +86,8 @@ void rt_hw_interrupt_init(void)
         irq_desc[idx].counter = 0;
 #endif
     }
-    
-    // enable machine external interrupt 
+
+    // enable machine external interrupt
     set_csr(mie, MIP_MEIP);
 }
 
@@ -132,7 +132,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
 }
 
 /**
- * This function will be call when external machine-level 
+ * This function will be call when external machine-level
  * interrupt from PLIC occurred.
  */
 void handle_m_ext_interrupt(void)

bsp/sparkfun-redv/drivers/interrupt.h

@@ -33,5 +33,5 @@ rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq);
 void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id);
 rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
         void *param, const char *name);
-        
+
 #endif

bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.c

@@ -6,15 +6,15 @@
 #include "fe300prci/fe300prci_driver.h"
 #include <unistd.h>
 
-#define rdmcycle(x)  {				       \
-    uint32_t lo, hi, hi2;			       \
-    __asm__ __volatile__ ("1:\n\t"		       \
-			  "csrr %0, mcycleh\n\t"       \
-			  "csrr %1, mcycle\n\t"	       \
-			  "csrr %2, mcycleh\n\t"		\
-			  "bne  %0, %2, 1b\n\t"			\
-			  : "=r" (hi), "=r" (lo), "=r" (hi2)) ;	\
-    *(x) = lo | ((uint64_t) hi << 32); 				\
+#define rdmcycle(x)  {                     \
+    uint32_t lo, hi, hi2;                  \
+    __asm__ __volatile__ ("1:\n\t"             \
+              "csrr %0, mcycleh\n\t"       \
+              "csrr %1, mcycle\n\t"        \
+              "csrr %2, mcycleh\n\t"        \
+              "bne  %0, %2, 1b\n\t"         \
+              : "=r" (hi), "=r" (lo), "=r" (hi2)) ; \
+    *(x) = lo | ((uint64_t) hi << 32);              \
   }
 
 uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq)
@@ -34,49 +34,49 @@ uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq)
   do {
     start_mtime = CLINT_REG(CLINT_MTIME);
   } while (start_mtime == tmp);
-  
+
   uint64_t start_mcycle;
   rdmcycle(&start_mcycle);
-  
+
   while (CLINT_REG(CLINT_MTIME) < end_mtime) ;
-  
+
   uint64_t end_mcycle;
   rdmcycle(&end_mcycle);
   uint32_t difference = (uint32_t) (end_mcycle - start_mcycle);
 
   uint64_t freq = ((uint64_t) difference * mtime_freq) / mtime_ticks;
   return (uint32_t) freq & 0xFFFFFFFF;
-  
+
 }
- 
+
 
 void PRCI_use_hfrosc(int div, int trim)
 {
   // Make sure the HFROSC is running at its default setting
   // It is OK to change this even if we are running off of it.
-  
+
   PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(div) | ROSC_TRIM(trim) | ROSC_EN(1));
 
   while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0);
-  
+
   PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(1);
 }
 
 void PRCI_use_pll(int refsel, int bypass,
-			 int r, int f, int q, int finaldiv,
-			 int hfroscdiv, int hfrosctrim)
+             int r, int f, int q, int finaldiv,
+             int hfroscdiv, int hfrosctrim)
 {
   // Ensure that we aren't running off the PLL before we mess with it.
   if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) {
     // Make sure the HFROSC is running at its default setting
     PRCI_use_hfrosc(4, 16);
   }
-  
+
   // Set PLL Source to be HFXOSC if desired.
   uint32_t config_value = 0;
 
   config_value |= PLL_REFSEL(refsel);
-  
+
   if (bypass) {
     // Bypass
     config_value |= PLL_BYPASS(1);
@@ -87,14 +87,14 @@ void PRCI_use_pll(int refsel, int bypass,
     // Set our Final output divide to divide-by-1:
     PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
   } else {
-  
+
     // To overclock, use the hfrosc
     if (hfrosctrim >= 0 && hfroscdiv >= 0) {
       PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
     }
-    
+
     // Set DIV Settings for PLL
-    
+
     // (Legal values of f_REF are 6-48MHz)
 
     // Set DIVR to divide-by-2 to get 8MHz frequency
@@ -132,7 +132,7 @@ void PRCI_use_pll(int refsel, int bypass,
     // So wait 4 ticks of RTC.
     uint32_t now = CLINT_REG(CLINT_MTIME);
     while (CLINT_REG(CLINT_MTIME) - now < 4) ;
-    
+
     // Now it is safe to check for PLL Lock
     while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0);
 
@@ -146,7 +146,7 @@ void PRCI_use_pll(int refsel, int bypass,
   if (refsel) {
     PRCI_REG(PRCI_HFROSCCFG) &= ~ROSC_EN(1);
   }
-  
+
 }
 
 void PRCI_use_default_clocks()
@@ -160,15 +160,15 @@ void PRCI_use_default_clocks()
 
 void PRCI_use_hfxosc(uint32_t finaldiv)
 {
-  
+
   PRCI_use_pll(1, // Use HFXTAL
-	       1, // Bypass = 1
-	       0, // PLL settings don't matter
-	       0, // PLL settings don't matter
-	       0, // PLL settings don't matter
-	       finaldiv,
-	       -1,
-	       -1);
+           1, // Bypass = 1
+           0, // PLL settings don't matter
+           0, // PLL settings don't matter
+           0, // PLL settings don't matter
+           finaldiv,
+           -1,
+           -1);
 }
 
 // This is a generic function, which
@@ -199,28 +199,28 @@ uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target )
   uint32_t desired_hfrosc_freq = (f_cpu/ 16);
 
   PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
-  
+
   // Ignore the first run (for icache reasons)
   uint32_t cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
 
   cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
   uint32_t prev_freq = cpu_freq;
-  
+
   while ((cpu_freq < desired_hfrosc_freq) && (hfrosctrim < 0x1F)){
     prev_trim = hfrosctrim;
     prev_freq = cpu_freq;
     hfrosctrim ++;
     PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
     cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-  } 
+  }
 
   // We couldn't go low enough
   if (prev_freq > desired_hfrosc_freq){
     PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
     cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ);
     return cpu_freq;
   }
-  
+
   // We couldn't go high enough
   if (cpu_freq < desired_hfrosc_freq){
     PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);

bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.h

@@ -8,15 +8,15 @@
 #include <unistd.h>
 
 typedef enum prci_freq_target {
-  
+
   PRCI_FREQ_OVERSHOOT,
   PRCI_FREQ_CLOSEST,
   PRCI_FREQ_UNDERSHOOT
 
 } PRCI_freq_target;
 
-/* Measure and return the approximate frequency of the 
- * CPU, as given by measuring the mcycle counter against 
+/* Measure and return the approximate frequency of the
+ * CPU, as given by measuring the mcycle counter against
  * the mtime ticks.
  */
 uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq);
@@ -34,7 +34,7 @@ void PRCI_use_hfxosc(uint32_t finaldiv);
 
 /* Safely switch over to the PLL using the given
  * settings.
- * 
+ *
  * Note that not all combinations of the inputs are actually
  * legal, and this function does not check for their
  * legality ("safely" means that this function won't turn off
@@ -43,30 +43,30 @@ void PRCI_use_hfxosc(uint32_t finaldiv);
  */
 
 void PRCI_use_pll(int refsel, int bypass,
-			 int r, int f, int q, int finaldiv,
-			 int hfroscdiv, int hfrosctrim);
+             int r, int f, int q, int finaldiv,
+             int hfroscdiv, int hfrosctrim);
 
 /* Use the default clocks configured at reset.
  * This is ~16Mhz HFROSC and turns off the LFROSC
- * (on the current FE310 Dev Platforms, an external LFROSC is 
+ * (on the current FE310 Dev Platforms, an external LFROSC is
  * used as it is more power efficient).
  */
 void PRCI_use_default_clocks();
 
 /* This routine will adjust the HFROSC trim
- * while using HFROSC as the clock source, 
+ * while using HFROSC as the clock source,
  * measure the resulting frequency, then
- * use it as the PLL clock source, 
- * in an attempt to get over, under, or close to the 
- * requested frequency. It returns the actual measured 
- * frequency. 
+ * use it as the PLL clock source,
+ * in an attempt to get over, under, or close to the
+ * requested frequency. It returns the actual measured
+ * frequency.
  *
- * Note that the requested frequency must be within the 
- * range supported by the PLL so not all values are 
- * achievable with this function, and not all 
+ * Note that the requested frequency must be within the
+ * range supported by the PLL so not all values are
+ * achievable with this function, and not all
  * are guaranteed to actually work. The PLL
  * is rated higher than the hardware.
- * 
+ *
  * There is no check on the desired f_cpu frequency, it
  * is up to the user to specify something reasonable.
  */
@@ -76,4 +76,4 @@ uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target);
 //__END_DECLS
 
 #endif
-  
+