Merge branch 'cloud-hypervisor:main' into dev

CMGS · web-flow · commit 75bb6f23bed3 · 2026-04-09T14:27:34.000+08:00
diff --git a/Cargo.lock b/Cargo.lock
diff --git a/Cargo.toml b/Cargo.toml
@@ -56,8 +56,8 @@ acpi_tables = "0.2.0"
 kvm-bindings = "0.14.0"
 kvm-ioctls = "0.24.0"
 linux-loader = "0.13.2"
-mshv-bindings = "0.6.7"
-mshv-ioctls = "0.6.7"
+mshv-bindings = "0.6.8"
+mshv-ioctls = "0.6.8"
 seccompiler = "0.5.0"
 vfio-bindings = { version = "0.6.2", default-features = false }
 vfio-ioctls = { version = "0.6.0", default-features = false }
diff --git a/fuzz/Cargo.lock b/fuzz/Cargo.lock
diff --git a/fuzz/Cargo.toml b/fuzz/Cargo.toml
@@ -25,7 +25,7 @@ libc = "0.2.183"
 libfuzzer-sys = "0.4.12"
 linux-loader = { version = "0.13.2", features = ["bzimage", "elf", "pe"] }
 micro_http = { git = "https://github.com/firecracker-microvm/micro-http", branch = "main" }
-mshv-bindings = "0.6.7"
+mshv-bindings = "0.6.8"
 net_util = { path = "../net_util" }
 seccompiler = "0.5.0"
 virtio-devices = { path = "../virtio-devices" }
diff --git a/hypervisor/src/arch/x86/mod.rs b/hypervisor/src/arch/x86/mod.rs
@@ -28,6 +28,36 @@ pub mod msr_index;
 // MTRR constants
 pub const MTRR_ENABLE: u64 = 0x800; // IA32_MTRR_DEF_TYPE MSR: E (MTRRs enabled) flag, bit 11
 pub const MTRR_MEM_TYPE_WB: u64 = 0x6;
+pub const MTRR_MSR_INDICES: [u32; 28] = [
+    msr_index::MSR_MTRRdefType,
+    msr_index::MSR_IA32_MTRR_PHYSBASE0,
+    msr_index::MSR_IA32_MTRR_PHYSMASK0,
+    msr_index::MSR_IA32_MTRR_PHYSBASE1,
+    msr_index::MSR_IA32_MTRR_PHYSMASK1,
+    msr_index::MSR_IA32_MTRR_PHYSBASE2,
+    msr_index::MSR_IA32_MTRR_PHYSMASK2,
+    msr_index::MSR_IA32_MTRR_PHYSBASE3,
+    msr_index::MSR_IA32_MTRR_PHYSMASK3,
+    msr_index::MSR_IA32_MTRR_PHYSBASE4,
+    msr_index::MSR_IA32_MTRR_PHYSMASK4,
+    msr_index::MSR_IA32_MTRR_PHYSBASE5,
+    msr_index::MSR_IA32_MTRR_PHYSMASK5,
+    msr_index::MSR_IA32_MTRR_PHYSBASE6,
+    msr_index::MSR_IA32_MTRR_PHYSMASK6,
+    msr_index::MSR_IA32_MTRR_PHYSBASE7,
+    msr_index::MSR_IA32_MTRR_PHYSMASK7,
+    msr_index::MSR_MTRRfix64K_00000,
+    msr_index::MSR_MTRRfix16K_80000,
+    msr_index::MSR_MTRRfix16K_A0000,
+    msr_index::MSR_MTRRfix4K_C0000,
+    msr_index::MSR_MTRRfix4K_C8000,
+    msr_index::MSR_MTRRfix4K_D0000,
+    msr_index::MSR_MTRRfix4K_D8000,
+    msr_index::MSR_MTRRfix4K_E0000,
+    msr_index::MSR_MTRRfix4K_E8000,
+    msr_index::MSR_MTRRfix4K_F0000,
+    msr_index::MSR_MTRRfix4K_F8000,
+];
 
 // IOAPIC pins
 pub const NUM_IOAPIC_PINS: usize = 24;
diff --git a/hypervisor/src/arch/x86/msr_index.rs b/hypervisor/src/arch/x86/msr_index.rs
@@ -85,6 +85,22 @@ pub const MSR_IA32_RTIT_ADDR3_B: ::std::os::raw::c_uint = 0x00000587;
 pub const MSR_IA32_RTIT_CR3_MATCH: ::std::os::raw::c_uint = 0x00000572;
 pub const MSR_IA32_RTIT_OUTPUT_BASE: ::std::os::raw::c_uint = 0x00000560;
 pub const MSR_IA32_RTIT_OUTPUT_MASK: ::std::os::raw::c_uint = 0x00000561;
+pub const MSR_IA32_MTRR_PHYSBASE0: ::std::os::raw::c_uint = 0x00000200;
+pub const MSR_IA32_MTRR_PHYSMASK0: ::std::os::raw::c_uint = 0x00000201;
+pub const MSR_IA32_MTRR_PHYSBASE1: ::std::os::raw::c_uint = 0x00000202;
+pub const MSR_IA32_MTRR_PHYSMASK1: ::std::os::raw::c_uint = 0x00000203;
+pub const MSR_IA32_MTRR_PHYSBASE2: ::std::os::raw::c_uint = 0x00000204;
+pub const MSR_IA32_MTRR_PHYSMASK2: ::std::os::raw::c_uint = 0x00000205;
+pub const MSR_IA32_MTRR_PHYSBASE3: ::std::os::raw::c_uint = 0x00000206;
+pub const MSR_IA32_MTRR_PHYSMASK3: ::std::os::raw::c_uint = 0x00000207;
+pub const MSR_IA32_MTRR_PHYSBASE4: ::std::os::raw::c_uint = 0x00000208;
+pub const MSR_IA32_MTRR_PHYSMASK4: ::std::os::raw::c_uint = 0x00000209;
+pub const MSR_IA32_MTRR_PHYSBASE5: ::std::os::raw::c_uint = 0x0000020a;
+pub const MSR_IA32_MTRR_PHYSMASK5: ::std::os::raw::c_uint = 0x0000020b;
+pub const MSR_IA32_MTRR_PHYSBASE6: ::std::os::raw::c_uint = 0x0000020c;
+pub const MSR_IA32_MTRR_PHYSMASK6: ::std::os::raw::c_uint = 0x0000020d;
+pub const MSR_IA32_MTRR_PHYSBASE7: ::std::os::raw::c_uint = 0x0000020e;
+pub const MSR_IA32_MTRR_PHYSMASK7: ::std::os::raw::c_uint = 0x0000020f;
 pub const MSR_MTRRfix64K_00000: ::std::os::raw::c_uint = 0x00000250;
 pub const MSR_MTRRfix16K_80000: ::std::os::raw::c_uint = 0x00000258;
 pub const MSR_MTRRfix16K_A0000: ::std::os::raw::c_uint = 0x00000259;
diff --git a/hypervisor/src/kvm/mod.rs b/hypervisor/src/kvm/mod.rs
@@ -70,7 +70,8 @@ pub use x86_64::{CpuId, ExtendedControlRegisters, MsrEntries, VcpuKvmState};
 use crate::ClockData;
 #[cfg(target_arch = "x86_64")]
 use crate::arch::x86::{
-    CpuIdEntry, FpuState, LapicState, MsrEntry, NUM_IOAPIC_PINS, SpecialRegisters, XsaveState,
+    CpuIdEntry, FpuState, LapicState, MTRR_MSR_INDICES, MsrEntry, NUM_IOAPIC_PINS,
+    SpecialRegisters, XsaveState,
 };
 use crate::{CpuState, IoEventAddress, IrqRoutingEntry, MpState, StandardRegisters};
 // aarch64 dependencies
@@ -1128,9 +1129,21 @@ impl KvmHypervisor {
     /// Retrieve the list of MSRs supported by the hypervisor.
     ///
     fn get_msr_list(&self) -> hypervisor::Result<MsrList> {
-        self.kvm
+        let mut indices = self
+            .kvm
             .get_msr_index_list()
-            .map_err(|e| hypervisor::HypervisorError::GetMsrList(e.into()))
+            .map_err(|e| hypervisor::HypervisorError::GetMsrList(e.into()))?
+            .as_slice()
+            .to_vec();
+
+        // KVM_GET_MSR_INDEX_LIST does not include MTRR MSRs, but firmware may update them before an early boot snapshot.
+        indices.extend(MTRR_MSR_INDICES);
+
+        let mut msr_list = MsrList::new(indices.len())
+            .map_err(|e| hypervisor::HypervisorError::GetMsrList(e.into()))?;
+        msr_list.as_mut_slice().copy_from_slice(&indices);
+
+        Ok(msr_list)
     }
 }
 
diff --git a/scripts/run_integration_tests_aarch64.sh b/scripts/run_integration_tests_aarch64.sh
@@ -285,7 +285,7 @@ fi
 
 # Run tests on dbus_api
 if [ $RES -eq 0 ]; then
-    cargo build --features "dbus_api" --all --release --target "$BUILD_TARGET"
+    cargo build --features "mshv,dbus_api" --all --release --target "$BUILD_TARGET"
     export RUST_BACKTRACE=1
     # integration tests now do not reply on build feature "dbus_api"
     time cargo nextest run $test_features --retries 3 --no-fail-fast --no-tests=pass --test-threads=$(($(nproc) / 4)) "dbus_api::$test_filter" -- ${test_binary_args[*]}
@@ -294,14 +294,14 @@ fi
 
 # Run tests on fw_cfg
 if [ $RES -eq 0 ]; then
-    cargo build --features "fw_cfg" --all --release --target "$BUILD_TARGET"
+    cargo build --features "mshv,fw_cfg" --all --release --target "$BUILD_TARGET"
     export RUST_BACKTRACE=1
     time cargo nextest run $test_features --retries 3 --no-fail-fast --no-tests=pass --test-threads=$(($(nproc) / 4)) "fw_cfg::$test_filter" -- ${test_binary_args[*]}
     RES=$?
 fi
 
 if [ $RES -eq 0 ]; then
-    cargo build --features "ivshmem" --all --release --target "$BUILD_TARGET"
+    cargo build --features "mshv,ivshmem" --all --release --target "$BUILD_TARGET"
     export RUST_BACKTRACE=1
     time cargo nextest run $test_features --retries 3 --no-fail-fast --no-tests=pass --test-threads=$(($(nproc) / 4)) "ivshmem::$test_filter" -- ${test_binary_args[*]}
 
diff --git a/virtio-devices/src/mem.rs b/virtio-devices/src/mem.rs
@@ -834,6 +834,10 @@ impl Mem {
         })
     }
 
+    pub fn plugged_size(&self) -> u64 {
+        self.config.lock().unwrap().plugged_size
+    }
+
     pub fn resize(&mut self, size: u64) -> result::Result<(), Error> {
         let mut config = self.config.lock().unwrap();
         config.resize(size).map_err(|e| {
diff --git a/virtio-devices/src/vdpa.rs b/virtio-devices/src/vdpa.rs
@@ -217,7 +217,7 @@ impl Vdpa {
 
     fn activate_vdpa(
         &mut self,
-        mem: &GuestMemoryMmap,
+        _mem: &GuestMemoryMmap,
         virtio_interrupt: &dyn VirtioInterrupt,
         queues: &[(usize, Queue, EventFd)],
     ) -> Result<()> {
@@ -269,13 +269,7 @@ impl Vdpa {
             self.vhost
                 .as_ref()
                 .unwrap()
-                .set_vring_base(
-                    *queue_index,
-                    queue
-                        .avail_idx(mem, Ordering::Acquire)
-                        .map_err(Error::GetAvailableIndex)?
-                        .0,
-                )
+                .set_vring_base(*queue_index, 0)
                 .map_err(Error::SetVringBase)?;
 
             if let Some(eventfd) =
diff --git a/virtio-devices/src/vsock/device.rs b/virtio-devices/src/vsock/device.rs
@@ -323,6 +323,8 @@ pub struct Vsock<B: VsockBackend> {
 pub struct VsockState {
     pub avail_features: u64,
     pub acked_features: u64,
+    #[serde(default)]
+    pub connections: Vec<(u32, u32)>,
 }
 
 impl<B> Vsock<B>
@@ -336,14 +338,17 @@ where
         id: String,
         cid: u32,
         path: PathBuf,
-        backend: B,
+        mut backend: B,
         iommu: bool,
         seccomp_action: SeccompAction,
         exit_evt: EventFd,
         state: Option<VsockState>,
     ) -> io::Result<Vsock<B>> {
         let (avail_features, acked_features, paused) = if let Some(state) = state {
             info!("Restoring virtio-vsock {id}");
+            // Instead of letting the guest connection hang/timeout, proactively let
+            // the guest know the connection is gone.
+            backend.queue_rst_for_connections(state.connections.clone());
             (state.avail_features, state.acked_features, true)
         } else {
             let mut avail_features = (1u64 << VIRTIO_F_VERSION_1) | (1u64 << VIRTIO_F_IN_ORDER);
@@ -378,6 +383,7 @@ where
         VsockState {
             avail_features: self.common.avail_features,
             acked_features: self.common.acked_features,
+            connections: self.backend.read().unwrap().connections(),
         }
     }
 
diff --git a/virtio-devices/src/vsock/mod.rs b/virtio-devices/src/vsock/mod.rs
@@ -158,7 +158,12 @@ pub trait VsockChannel {
 /// It that needs to be sendable through a mpsc channel (the latter due to how `vmm::EpollContext` works).
 /// Currently, the only implementation we have is `crate::virtio::unix::muxer::VsockMuxer`, which
 /// translates guest-side vsock connections to host-side Unix domain socket connections.
-pub trait VsockBackend: VsockChannel + VsockEpollListener + Send {}
+pub trait VsockBackend: VsockChannel + VsockEpollListener + Send {
+    fn connections(&self) -> Vec<(u32, u32)> {
+        Vec::new()
+    }
+    fn queue_rst_for_connections(&mut self, _conns: Vec<(u32, u32)>) {}
+}
 
 #[cfg(any(test, fuzzing))]
 pub mod unit_tests {
diff --git a/virtio-devices/src/vsock/unix/muxer.rs b/virtio-devices/src/vsock/unix/muxer.rs
@@ -345,7 +345,23 @@ impl VsockEpollListener for VsockMuxer {
     }
 }
 
-impl VsockBackend for VsockMuxer {}
+impl VsockBackend for VsockMuxer {
+    fn connections(&self) -> Vec<(u32, u32)> {
+        self.conn_map
+            .keys()
+            .map(|k| (k.local_port, k.peer_port))
+            .collect()
+    }
+
+    fn queue_rst_for_connections(&mut self, conns: Vec<(u32, u32)>) {
+        for (local_port, peer_port) in conns {
+            self.rxq.push(MuxerRx::RstPkt {
+                local_port,
+                peer_port,
+            });
+        }
+    }
+}
 
 impl VsockMuxer {
     /// Muxer constructor.
diff --git a/vmm/src/config.rs b/vmm/src/config.rs
@@ -1039,21 +1039,24 @@ impl MemoryConfig {
     }
 
     pub fn total_size(&self) -> u64 {
-        let mut size = self.size;
-        if let Some(hotplugged_size) = self.hotplugged_size {
-            size += hotplugged_size;
-        }
-
-        if let Some(zones) = &self.zones {
-            for zone in zones.iter() {
-                size += zone.size;
-                if let Some(hotplugged_size) = zone.hotplugged_size {
-                    size += hotplugged_size;
-                }
-            }
-        }
+        self.size
+            + self
+                .zones
+                .iter()
+                .flatten()
+                .map(|zone| zone.size)
+                .sum::<u64>()
+            + self.hotplugged_size()
+    }
 
-        size
+    pub fn hotplugged_size(&self) -> u64 {
+        self.hotplugged_size.unwrap_or(0)
+            + self
+                .zones
+                .iter()
+                .flatten()
+                .filter_map(|zone| zone.hotplugged_size)
+                .sum::<u64>()
     }
 }
 
diff --git a/vmm/src/lib.rs b/vmm/src/lib.rs
@@ -1915,9 +1915,11 @@ impl RequestHandler for Vmm {
                 };
                 let config = vm_config.lock().unwrap().clone();
 
-                let mut memory_actual_size = config.memory.total_size();
+                let mut memory_actual_size =
+                    config.memory.total_size() - config.memory.hotplugged_size();
                 if let Some(vm) = &self.vm {
                     memory_actual_size = memory_actual_size.saturating_sub(vm.balloon_size());
+                    memory_actual_size += vm.virtio_mem_plugged_size();
                 }
 
                 let device_tree = self
diff --git a/vmm/src/memory_manager.rs b/vmm/src/memory_manager.rs
@@ -2420,6 +2420,19 @@ impl MemoryManager {
         unsafe { (*stat.as_ptr()).st_nlink as usize > 0 }
     }
 
+    pub fn virtio_mem_plugged_size(&self) -> u64 {
+        self.memory_zones
+            .values()
+            .filter_map(|zone| {
+                zone.virtio_mem_zone
+                    .as_ref()?
+                    .virtio_device
+                    .as_ref()
+                    .map(|dev| dev.lock().unwrap().plugged_size())
+            })
+            .sum()
+    }
+
     pub fn memory_zones(&self) -> &MemoryZones {
         &self.memory_zones
     }
diff --git a/vmm/src/vm.rs b/vmm/src/vm.rs
@@ -2822,6 +2822,14 @@ impl Vm {
         self.device_manager.lock().unwrap().balloon_size()
     }
 
+    /// Get the actual size of the virtio_mem regions
+    pub fn virtio_mem_plugged_size(&self) -> u64 {
+        self.memory_manager
+            .lock()
+            .unwrap()
+            .virtio_mem_plugged_size()
+    }
+
     pub fn send_memory_fds(
         &mut self,
         socket: &mut UnixStream,
