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[SYCL][NativeCPU] Move __spirv_AtomicF{Add,Min,Max}EXT into libclc. (#19365)
1 parent 6ccaafd commit ebe9758

9 files changed

Lines changed: 132 additions & 123 deletions

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‎libclc/libspirv/lib/native_cpu/SOURCES‎

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@@ -11,6 +11,9 @@ math/native_log2.cl
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math/native_sin.cl
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math/native_sqrt.cl
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math/round.cl
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atomic/atomic_add.ll
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atomic/atomic_max.ll
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atomic/atomic_min.ll
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workitem/get_global_id.cl
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workitem/get_global_size.cl
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workitem/get_num_sub_groups.cl

‎libclc/libspirv/lib/native_cpu/atomic/atomic_add.ll‎

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;;===----------------------------------------------------------------------===;;
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;
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; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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; See https://llvm.org/LICENSE.txt for license information.
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; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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;
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;;===----------------------------------------------------------------------===;;
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define float @_Z21__spirv_AtomicFAddEXTPfiif(ptr noundef %p, i32 noundef %scope, i32 noundef %semantics, float noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fadd ptr %p, float %val seq_cst, align 4
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ret float %0
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}
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define float @_Z21__spirv_AtomicFAddEXTPU3AS1fiif(ptr addrspace(1) noundef %p, i32 noundef %scope, i32 noundef %semantics, float noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fadd ptr addrspace(1) %p, float %val seq_cst, align 4
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ret float %0
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}
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define float @_Z21__spirv_AtomicFAddEXTPU3AS3fiif(ptr addrspace(3) noundef %p, i32 noundef %scope, i32 noundef %semantics, float noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fadd ptr addrspace(3) %p, float %val seq_cst, align 4
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ret float %0
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}
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define double @_Z21__spirv_AtomicFAddEXTPdiid(ptr noundef %p, i32 noundef %scope, i32 noundef %semantics, double noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fadd ptr %p, double %val seq_cst, align 8
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ret double %0
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}
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define double @_Z21__spirv_AtomicFAddEXTPU3AS1diid(ptr addrspace(1) noundef %p, i32 noundef %scope, i32 noundef %semantics, double noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fadd ptr addrspace(1) %p, double %val seq_cst, align 8
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ret double %0
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}
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define double @_Z21__spirv_AtomicFAddEXTPU3AS3diid(ptr addrspace(3) noundef %p, i32 noundef %scope, i32 noundef %semantics, double noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fadd ptr addrspace(3) %p, double %val seq_cst, align 8
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ret double %0
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}

‎libclc/libspirv/lib/native_cpu/atomic/atomic_max.ll‎

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;;===----------------------------------------------------------------------===;;
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;
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; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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; See https://llvm.org/LICENSE.txt for license information.
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; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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;
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;;===----------------------------------------------------------------------===;;
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define float @_Z21__spirv_AtomicFMaxEXTPfiif(ptr noundef %p, i32 noundef %scope, i32 noundef %semantics, float noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmax ptr %p, float %val seq_cst, align 4
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ret float %0
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}
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define float @_Z21__spirv_AtomicFMaxEXTPU3AS1fiif(ptr addrspace(1) noundef %p, i32 noundef %scope, i32 noundef %semantics, float noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmax ptr addrspace(1) %p, float %val seq_cst, align 4
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ret float %0
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}
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define float @_Z21__spirv_AtomicFMaxEXTPU3AS3fiif(ptr addrspace(3) noundef %p, i32 noundef %scope, i32 noundef %semantics, float noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmax ptr addrspace(3) %p, float %val seq_cst, align 4
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ret float %0
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}
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define double @_Z21__spirv_AtomicFMaxEXTPdiid(ptr noundef %p, i32 noundef %scope, i32 noundef %semantics, double noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmax ptr %p, double %val seq_cst, align 8
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ret double %0
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}
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define double @_Z21__spirv_AtomicFMaxEXTPU3AS1diid(ptr addrspace(1) noundef %p, i32 noundef %scope, i32 noundef %semantics, double noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmax ptr addrspace(1) %p, double %val seq_cst, align 8
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ret double %0
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}
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define double @_Z21__spirv_AtomicFMaxEXTPU3AS3diid(ptr addrspace(3) noundef %p, i32 noundef %scope, i32 noundef %semantics, double noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmax ptr addrspace(3) %p, double %val seq_cst, align 8
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ret double %0
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}

‎libclc/libspirv/lib/native_cpu/atomic/atomic_min.ll‎

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@@ -0,0 +1,43 @@
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;;===----------------------------------------------------------------------===;;
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;
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; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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; See https://llvm.org/LICENSE.txt for license information.
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; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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;
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;;===----------------------------------------------------------------------===;;
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define float @_Z21__spirv_AtomicFMinEXTPfiif(ptr noundef %p, i32 noundef %scope, i32 noundef %semantics, float noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmin ptr %p, float %val seq_cst, align 4
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ret float %0
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}
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define float @_Z21__spirv_AtomicFMinEXTPU3AS1fiif(ptr addrspace(1) noundef %p, i32 noundef %scope, i32 noundef %semantics, float noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmin ptr addrspace(1) %p, float %val seq_cst, align 4
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ret float %0
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}
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define float @_Z21__spirv_AtomicFMinEXTPU3AS3fiif(ptr addrspace(3) noundef %p, i32 noundef %scope, i32 noundef %semantics, float noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmin ptr addrspace(3) %p, float %val seq_cst, align 4
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ret float %0
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}
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define double @_Z21__spirv_AtomicFMinEXTPdiid(ptr noundef %p, i32 noundef %scope, i32 noundef %semantics, double noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmin ptr %p, double %val seq_cst, align 8
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ret double %0
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}
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define double @_Z21__spirv_AtomicFMinEXTPU3AS1diid(ptr addrspace(1) noundef %p, i32 noundef %scope, i32 noundef %semantics, double noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmin ptr addrspace(1) %p, double %val seq_cst, align 8
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ret double %0
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}
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define double @_Z21__spirv_AtomicFMinEXTPU3AS3diid(ptr addrspace(3) noundef %p, i32 noundef %scope, i32 noundef %semantics, double noundef %val) nounwind alwaysinline {
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entry:
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%0 = atomicrmw fmin ptr addrspace(3) %p, double %val seq_cst, align 8
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ret double %0
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}

‎llvm/include/llvm/SYCLLowerIR/FAtomicsNativeCPU.h‎

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This file was deleted.

‎llvm/lib/SYCLNativeCPUUtils/CMakeLists.txt‎

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@@ -3,7 +3,6 @@ add_llvm_component_library(LLVMSYCLNativeCPUUtils
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PrepareSYCLNativeCPU.cpp
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RenameKernelSYCLNativeCPU.cpp
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ConvertToMuxBuiltinsSYCLNativeCPU.cpp
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FAtomicsNativeCPU.cpp
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ADDITIONAL_HEADER_DIRS
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${LLVM_MAIN_INCLUDE_DIR}/llvm/SYCLLowerIR

‎llvm/lib/SYCLNativeCPUUtils/FAtomicsNativeCPU.cpp‎

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This file was deleted.

‎llvm/lib/SYCLNativeCPUUtils/PipelineSYCLNativeCPU.cpp‎

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//
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//===----------------------------------------------------------------------===//
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#include "llvm/SYCLLowerIR/ConvertToMuxBuiltinsSYCLNativeCPU.h"
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#include "llvm/SYCLLowerIR/FAtomicsNativeCPU.h"
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#include "llvm/SYCLLowerIR/PrepareSYCLNativeCPU.h"
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#include "llvm/SYCLLowerIR/RenameKernelSYCLNativeCPU.h"
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#include "llvm/SYCLLowerIR/SpecConstants.h"
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OptimizationLevel OptLevel) {
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MPM.addPass(SpecConstantsPass(SpecConstantsPass::HandlingMode::emulation));
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MPM.addPass(ConvertToMuxBuiltinsSYCLNativeCPUPass());
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MPM.addPass(FAtomicsNativeCPU());
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#ifdef NATIVECPU_USE_OCK
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MPM.addPass(compiler::utils::PrepareBarriersPass());
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MPM.addPass(compiler::utils::TransferKernelMetadataPass());

‎sycl/test/check_device_code/native_cpu/fp_atomic.cpp‎

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