@@ -86,6 +86,10 @@ struct extended_msg tx_emsg[CONFIG_USB_PD_PORT_MAX_COUNT];
8686
8787bool verbose_msg_logging ;
8888static bool firmware_update ;
89+ static int pd_3a_flag ;
90+ static int pd_3a_controller ;
91+ static int pd_3a_port ;
92+
8993
9094void set_pd_fw_update (bool update )
9195{
@@ -478,13 +482,15 @@ int cyp5525_setup(int controller)
478482 */
479483
480484 int rv , data , i ;
481- #define CYPD_SETUP_CMDS_LEN 5
485+ #define CYPD_SETUP_CMDS_LEN 7
482486 struct {
483487 int reg ;
484488 int value ;
485489 int length ;
486490 int status_reg ;
487491 } const cypd_setup_cmds [] = {
492+ { CYP5525_PD_CONTROL_REG (0 ), CYPD_PD_CMD_SET_TYPEC_1_5A , CYP5525_PORT0_INTR }, /* Set the port 0 PDO 1.5A */
493+ { CYP5525_PD_CONTROL_REG (1 ), CYPD_PD_CMD_SET_TYPEC_1_5A , CYP5525_PORT1_INTR }, /* Set the port 1 PDO 1.5A */
488494 { CYP5525_EVENT_MASK_REG (0 ), 0x7ffff , 4 , CYP5525_PORT0_INTR }, /* Set the port 0 event mask */
489495 { CYP5525_EVENT_MASK_REG (1 ), 0x7ffff , 4 , CYP5525_PORT1_INTR }, /* Set the port 1 event mask */
490496 { CYP5525_VDM_EC_CONTROL_REG (0 ), CYP5525_EXTEND_MSG_CTRL_EN , 1 , CYP5525_PORT0_INTR }, /* Set the port 0 event mask */
@@ -971,6 +977,8 @@ void cyp5525_port_int(int controller, int port)
971977 pd_port_states [port_idx ].current = 0 ;
972978 pd_port_states [port_idx ].voltage = 0 ;
973979 pd_set_input_current_limit (port_idx , 0 , 0 );
980+ cypd_port_3a_release (controller , port );
981+ cypd_set_typec_profile (controller , port );
974982 cypd_update_port_state (controller , port );
975983
976984 if (IS_ENABLED (CONFIG_CHARGE_MANAGER ))
@@ -979,10 +987,12 @@ void cyp5525_port_int(int controller, int port)
979987 case CYPD_RESPONSE_PD_CONTRACT_NEGOTIATION_COMPLETE :
980988 CPRINTS ("CYPD_RESPONSE_PD_CONTRACT_NEGOTIATION_COMPLETE %d" , port_idx );
981989 /*todo we can probably clean this up to remove some of this*/
990+ cypd_set_typec_profile (controller , port );
982991 cypd_update_port_state (controller , port );
983992 break ;
984993 case CYPD_RESPONSE_PORT_CONNECT :
985994 CPRINTS ("CYPD_RESPONSE_PORT_CONNECT %d" , port_idx );
995+ cypd_set_typec_profile (controller , port );
986996 cypd_update_port_state (controller , port );
987997 break ;
988998 case CYPD_RESPONSE_EXT_MSG_SOP_RX :
@@ -1300,6 +1310,14 @@ void cypd_interrupt_handler_task(void *p)
13001310 cypd_reconnect_port_enable (1 );
13011311 }
13021312
1313+ /*
1314+ * USCI PPM RESET will make PD current setting to default
1315+ * need setting port current again
1316+ */
1317+ if (evt & CYPD_EVT_UCSI_PPM_RESET ) {
1318+ cypd_port_current_setting ();
1319+ }
1320+
13031321 if (evt & CYPD_EVT_S_CHANGE ) {
13041322 update_system_power_state ();
13051323 }
@@ -1404,6 +1422,119 @@ void cypd_aconly_reconnect(void)
14041422 }
14051423}
14061424
1425+ void cypd_usci_ppm_reset (void )
1426+ {
1427+ int events ;
1428+
1429+ events = task_wait_event_mask (TASK_EVENT_TIMER , 50 * MSEC );
1430+ if (events & TASK_EVENT_TIMER )
1431+ cypd_enque_evt (CYPD_EVT_UCSI_PPM_RESET , 0 );
1432+ }
1433+
1434+ void cypd_port_current_setting (void )
1435+ {
1436+ for (int i = 0 ; i < PD_CHIP_COUNT ; i ++ ) {
1437+ cypd_set_typec_profile (i , 0 );
1438+ cypd_set_typec_profile (i , 1 );
1439+ }
1440+ }
1441+
1442+ int cypd_port_3a_status (int controller , int port )
1443+ {
1444+ int port_idx = (controller << 1 ) + port ;
1445+
1446+ if (pd_3a_flag &&
1447+ controller == pd_3a_controller &&
1448+ port_idx == pd_3a_port )
1449+ return true;
1450+ return false;
1451+ }
1452+
1453+ void cypd_port_3a_release (int controller , int port )
1454+ {
1455+ if (cypd_port_3a_status (controller , port )) {
1456+ pd_3a_flag = 0 ;
1457+ CPRINTS ("CYPD release 3A" );
1458+ }
1459+ }
1460+
1461+ void cypd_set_port_3a (int controller , int port )
1462+ {
1463+ int port_idx = (controller << 1 ) + port ;
1464+
1465+ pd_3a_flag = 1 ;
1466+ pd_3a_controller = controller ;
1467+ pd_3a_port = port_idx ;
1468+ }
1469+
1470+ void cypd_set_typec_profile (int controller , int port )
1471+ {
1472+ int rv ;
1473+ uint8_t pd_status_reg [4 ];
1474+ uint8_t rdo_reg [4 ];
1475+
1476+ int typec_status_reg ;
1477+ int rdo_max_current = 0 ;
1478+ int port_idx = (controller << 1 ) + port ;
1479+
1480+ rv = cypd_read_reg8 (controller , CYP5525_TYPE_C_STATUS_REG (port ), & typec_status_reg );
1481+ if (rv != EC_SUCCESS )
1482+ CPRINTS ("CYP5525_TYPE_C_STATUS_REG failed" );
1483+ pd_port_states [port_idx ].c_state = (typec_status_reg >> 2 ) & 0x7 ;
1484+
1485+ /* if port no device connect set type c profile to 1.5A */
1486+ if (pd_port_states [port_idx ].c_state == CYPD_STATUS_NOTHING ) {
1487+ cypd_write_reg8 (controller , CYP5525_PD_CONTROL_REG (port ), CYPD_PD_CMD_SET_TYPEC_1_5A );
1488+ return ;
1489+ }
1490+
1491+ rv = cypd_read_reg_block (controller , CYP5525_PD_STATUS_REG (port ), pd_status_reg , 4 );
1492+ if (rv != EC_SUCCESS )
1493+ CPRINTS ("CYP5525_PD_STATUS_REG failed" );
1494+ pd_port_states [port_idx ].pd_state = pd_status_reg [1 ] & BIT (2 ) ? 1 : 0 ; /*do we have a valid PD contract*/
1495+ pd_port_states [port_idx ].power_role = pd_status_reg [1 ] & BIT (0 ) ? PD_ROLE_SOURCE : PD_ROLE_SINK ;
1496+ pd_port_states [port_idx ].data_role = pd_status_reg [0 ] & BIT (6 ) ? PD_ROLE_DFP : PD_ROLE_UFP ;
1497+ pd_port_states [port_idx ].vconn = pd_status_reg [1 ] & BIT (5 ) ? PD_ROLE_VCONN_SRC : PD_ROLE_VCONN_OFF ;
1498+
1499+ if (pd_port_states [port_idx ].power_role == PD_ROLE_SINK )
1500+ return ;
1501+
1502+ if (pd_port_states [port_idx ].power_role == PD_ROLE_SOURCE ) {
1503+ if (pd_port_states [port_idx ].pd_state ) {
1504+ /*
1505+ * first time set 3A PDO to device
1506+ * when device request RDO <= 1.5A
1507+ * resend 1.5A pdo to device
1508+ */
1509+ if (!pd_3a_flag )
1510+ cypd_write_reg8 (controller , CYP5525_SELECT_SOURCE_PDO_REG (port ), CYPD_PD_CMD_SET_TYPEC_3A );
1511+ else
1512+ cypd_write_reg8 (controller , CYP5525_SELECT_SOURCE_PDO_REG (port ), CYPD_PD_CMD_SET_TYPEC_1_5A );
1513+
1514+ cypd_read_reg_block (controller , CYP5525_CURRENT_RDO_REG (port ), rdo_reg , 4 );
1515+ rdo_max_current = (((rdo_reg [1 ]>>2 ) + (rdo_reg [2 ]<<6 )) & 0x3FF )* 10 ;
1516+
1517+ if (rdo_max_current <= 1500 ) {
1518+ cypd_write_reg8 (controller , CYP5525_PD_CONTROL_REG (port ), CYPD_PD_CMD_SET_TYPEC_1_5A );
1519+ cypd_write_reg8 (controller , CYP5525_SELECT_SOURCE_PDO_REG (port ), CYPD_PD_CMD_SET_TYPEC_1_5A );
1520+ } else if (!pd_3a_flag ) {
1521+ cypd_set_port_3a (controller , port );
1522+ cypd_write_reg8 (controller , CYP5525_PD_CONTROL_REG (port ), CYPD_PD_CMD_SET_TYPEC_3A );
1523+ cypd_write_reg8 (controller , CYP5525_SELECT_SOURCE_PDO_REG (port ), CYPD_PD_CMD_SET_TYPEC_3A );
1524+ } else if (cypd_port_3a_status (controller , port )) {
1525+ cypd_write_reg8 (controller , CYP5525_PD_CONTROL_REG (port ), CYPD_PD_CMD_SET_TYPEC_3A );
1526+ cypd_write_reg8 (controller , CYP5525_SELECT_SOURCE_PDO_REG (port ), CYPD_PD_CMD_SET_TYPEC_3A );
1527+ } else {
1528+ cypd_write_reg8 (controller , CYP5525_PD_CONTROL_REG (port ), CYPD_PD_CMD_SET_TYPEC_1_5A );
1529+ cypd_write_reg8 (controller , CYP5525_SELECT_SOURCE_PDO_REG (port ), CYPD_PD_CMD_SET_TYPEC_1_5A );
1530+ }
1531+ } else {
1532+ cypd_write_reg8 (controller , CYP5525_PD_CONTROL_REG (port ), CYPD_PD_CMD_SET_TYPEC_1_5A );
1533+ }
1534+ }
1535+ }
1536+
1537+
14071538int cypd_get_pps_power_budget (void )
14081539{
14091540 /* TODO:
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