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Josh-Tsaiquinchou77
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fwk: don't call the battery and charger function in PD code if no support
Some of the PD functions are related to battery and charger. If EC does not support battery and charger, EC should not call those functions in the code to avoid the compiler error. This change uses the #ifdef and IS_ENABLE() to avoid the function being called if EC does not support it. BRANCH=fwk-main BUG=None TEST=PD function works well on the marigold unit TEST=zmake build marigold pass Signed-off-by: Josh Tsai <Josh_Tsai@compal.com> (cherry picked from commit 759a8f5)
1 parent 05c9bba commit e5376e2

2 files changed

Lines changed: 41 additions & 21 deletions

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zephyr/program/framework/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,7 @@ config PD_CCG6_CUSTOMIZE_BATT_MESSAGE
9292
bool "Enable CCG6 Customize battery response"
9393
default n
9494
depends on PD_CHIP_CCG6
95+
depends on PLATFORM_EC_BATTERY
9596
help
9697
Enable customize battery response for GRL test, EC will write specific
9798
register 0x4f to PD for GET_BATTERY_CAP and GET_BATTERY_STATUS.

zephyr/program/framework/src/cypress_pd_common.c

Lines changed: 40 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1059,16 +1059,20 @@ void cypd_update_port_state(int controller, int port)
10591059
if (pd_current == 0)
10601060
type_c_current = pd_current;
10611061

1062-
typec_set_input_current_limit(port_idx, type_c_current, TYPE_C_VOLTAGE);
1063-
charge_manager_set_ceil(port_idx, CEIL_REQUESTOR_PD,
1064-
type_c_current);
1062+
if (IS_ENABLED(CONFIG_PLATFORM_EC_CHARGE_MANAGER)) {
1063+
typec_set_input_current_limit(port_idx, type_c_current, TYPE_C_VOLTAGE);
1064+
charge_manager_set_ceil(port_idx, CEIL_REQUESTOR_PD,
1065+
type_c_current);
1066+
}
10651067
pd_port_states[port_idx].current = type_c_current;
10661068
pd_port_states[port_idx].voltage = TYPE_C_VOLTAGE;
10671069
} else {
1068-
typec_set_input_current_limit(port_idx, 0, 0);
1069-
charge_manager_set_ceil(port,
1070-
CEIL_REQUESTOR_PD,
1071-
CHARGE_CEIL_NONE);
1070+
if (IS_ENABLED(CONFIG_PLATFORM_EC_CHARGE_MANAGER)) {
1071+
typec_set_input_current_limit(port_idx, 0, 0);
1072+
charge_manager_set_ceil(port,
1073+
CEIL_REQUESTOR_PD,
1074+
CHARGE_CEIL_NONE);
1075+
}
10721076
}
10731077
if (pd_port_states[port_idx].c_state == CCG_STATUS_SINK) {
10741078
pd_port_states[port_idx].current = type_c_current;
@@ -1082,19 +1086,25 @@ void cypd_update_port_state(int controller, int port)
10821086

10831087
if (pd_port_states[port_idx].pd_state) {
10841088
if (pd_port_states[port_idx].power_role == PD_ROLE_SINK) {
1085-
pd_set_input_current_limit(port_idx, pd_current, pd_voltage);
1086-
charge_manager_set_ceil(port_idx, CEIL_REQUESTOR_PD, pd_current);
1089+
if (IS_ENABLED(CONFIG_PLATFORM_EC_CHARGE_MANAGER)) {
1090+
pd_set_input_current_limit(port_idx, pd_current, pd_voltage);
1091+
charge_manager_set_ceil(port_idx, CEIL_REQUESTOR_PD, pd_current);
1092+
}
10871093
pd_port_states[port_idx].current = pd_current;
10881094
pd_port_states[port_idx].voltage = pd_voltage;
10891095
} else {
1090-
pd_set_input_current_limit(port_idx, 0, 0);
1096+
if (IS_ENABLED(CONFIG_PLATFORM_EC_CHARGE_MANAGER)) {
1097+
pd_set_input_current_limit(port_idx, 0, 0);
1098+
}
10911099
/*Source*/
10921100
pd_port_states[port_idx].current = rdo_max_current;
10931101
pd_port_states[port_idx].voltage = TYPE_C_VOLTAGE;
10941102

10951103
}
10961104
} else {
1097-
pd_set_input_current_limit(port_idx, 0, 0);
1105+
if (IS_ENABLED(CONFIG_PLATFORM_EC_CHARGE_MANAGER)) {
1106+
pd_set_input_current_limit(port_idx, 0, 0);
1107+
}
10981108
}
10991109
#if DT_NODE_EXISTS(DT_ALIAS(gpio_mux_uart_flip))
11001110
if (pd_port_states[CONFIG_PD_CCG6_EC_UART_DEBUG_PORT].c_state == CCG_STATUS_DEBUG ||
@@ -1147,19 +1157,24 @@ static void cypd_update_power_status(int controller)
11471157
{
11481158
int rv = EC_SUCCESS;
11491159
int power_status = 0;
1160+
1161+
__ASSERT(controller < PD_CHIP_COUNT, "Invalid PD chip controller id in %s.", __func__);
1162+
1163+
#ifdef CONFIG_PLATFORM_EC_BATTERY
11501164
int pd_controller_is_sink = (prev_charge_port & 0x02) >> 1;
11511165
bool battery_can_discharge = (battery_is_present() == BP_YES) &
11521166
battery_get_disconnect_state();
11531167

1154-
__ASSERT(controller < PD_CHIP_COUNT, "Invalid PD chip controller id in %s.", __func__);
1155-
11561168
if (battery_can_discharge)
11571169
power_status |= CCG_POWERSTAT_BATT_PRESENT;
11581170

11591171
if ((extpower_is_present() && battery_can_discharge) ||
11601172
(extpower_is_present() && controller != pd_controller_is_sink &&
11611173
prev_charge_port >= 0))
11621174
power_status |= CCG_POWERSTAT_EXT_POWER_PRESENT + CCG_POWERSTAT_EXT_POWER_TYPE;
1175+
#endif
1176+
1177+
power_status = CCG_POWERSTAT_INTERNAL_POWER;
11631178

11641179
rv = cypd_write_reg8_wait_ack(controller, CCG_POWER_STAT, power_status);
11651180
if (rv != EC_SUCCESS) {
@@ -1741,8 +1756,9 @@ void cypd_port_int(int controller, int port)
17411756
pd_port_states[port_idx].epr_support = 1;
17421757
CPRINTS("P%d EPR mode capable", port_idx);
17431758
}
1744-
1759+
#ifdef CONFIG_PLATFORM_EC_BATTERY_CUT_OFF
17451760
if (!battery_is_cut_off() && !battery_cutoff_in_progress())
1761+
#endif
17461762
snk_transition_flags = 1;
17471763

17481764
break;
@@ -1756,7 +1772,8 @@ void cypd_port_int(int controller, int port)
17561772
case CCG_RESPONSE_ACCEPT_MSG_RX:
17571773
CPRINTS("CCG_RESPONSE_ACCEPT_MSG_RX %d", port_idx);
17581774
if (snk_transition_flags) {
1759-
charge_manager_force_ceil(port_idx, 500);
1775+
if (IS_ENABLED(CONFIG_PLATFORM_EC_CHARGE_MANAGER))
1776+
charge_manager_force_ceil(port_idx, 500);
17601777
snk_transition_flags = 0;
17611778
}
17621779
break;
@@ -1887,9 +1904,11 @@ void cypd_interrupt_handler_task(void *p)
18871904
int i, j, evt;
18881905

18891906
/* Initialize all charge suppliers to 0 */
1890-
for (i = 0; i < CHARGE_PORT_COUNT; i++) {
1891-
for (j = 0; j < CHARGE_SUPPLIER_COUNT; j++)
1892-
charge_manager_update_charge(j, i, NULL);
1907+
if (IS_ENABLED(CONFIG_CHARGE_MANAGER)) {
1908+
for (i = 0; i < CHARGE_PORT_COUNT; i++) {
1909+
for (j = 0; j < CHARGE_SUPPLIER_COUNT; j++)
1910+
charge_manager_update_charge(j, i, NULL);
1911+
}
18931912
}
18941913

18951914
/* trigger the handle_state to start setup in task */
@@ -2123,7 +2142,6 @@ void perform_error_recovery(int controller)
21232142
{
21242143
int port;
21252144
uint8_t data[2] = {0x00, CCG_PD_USER_CMD_TYPEC_ERR_RECOVERY};
2126-
uint32_t batt_os_percentage = get_system_percentage() / 10;
21272145

21282146
__ASSERT(controller < PD_CHIP_COUNT, "Invalid PD chip controller id in %s.", __func__);
21292147

@@ -2133,12 +2151,13 @@ void perform_error_recovery(int controller)
21332151
* battery percentage less than 1%.
21342152
*/
21352153
for (port = 0; port < PORTS_PER_CONTROLLER; port++) {
2154+
#ifdef CONFIG_PLATFORM_EC_BATTERY
21362155
if (CONTROLLER_PORT_TO_CHARGE_PORT(controller, port) ==
21372156
get_active_charge_pd_port() &&
21382157
(battery_get_disconnect_state() != BATTERY_NOT_DISCONNECTED ||
2139-
batt_os_percentage < 1))
2158+
(get_system_percentage() / 10) < 1))
21402159
continue;
2141-
2160+
#endif
21422161
data[0] = port;
21432162
cypd_write_reg_block(controller, CCG_DPM_CMD_REG, data, 2);
21442163
}

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