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Arm64 jitstress outerloop#126736

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dhartglassMSFT wants to merge 1 commit intodotnet:mainfrom
dhartglassMSFT:fix_jitstress_arm64_outerloop
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Arm64 jitstress outerloop#126736
dhartglassMSFT wants to merge 1 commit intodotnet:mainfrom
dhartglassMSFT:fix_jitstress_arm64_outerloop

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@dhartglassMSFT dhartglassMSFT commented Apr 10, 2026 •
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Original fix here missed some cases, as msbuild or helix cuts off the failure list after 300:

95f94b6

This is applying the same fix to other locations we needed this.

I grabbed this codechange from @ylpoonlg (thanks in advance)

Ran jitstress, arm64 is green

Copilot AI review requested due to automatic review settings April 10, 2026 00:24
@github-actions github-actions bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 10, 2026
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dhartglassMSFT commented Apr 10, 2026

/azp run runtime-coreclr jitstress2-jitstressregs

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dotnet-policy-service bot commented Apr 10, 2026

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
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Pull request overview

This PR adjusts ARM64 JIT HWIntrinsic codegen to correctly account for multi-instruction expansion in RMW-style SVE intrinsics when generating non-constant-immediate jump tables. This aligns the HWIntrinsicImmOpHelper case-size calculation with the emitter’s behavior under register-stress scenarios (e.g., targetReg != op1Reg).

Changes:

  • Pass an explicit numInstrs to HWIntrinsicImmOpHelper for SVE saturating inc/dec-by-element-count codegen when the emitter may insert an extra move.
  • Pass an explicit numInstrs to HWIntrinsicImmOpHelper for NI_Sve_ExtractVector to match the emitter’s RMW handling (may require a move when targetReg != op1Reg).

This was referenced Apr 10, 2026
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@dhartglassMSFT dhartglassMSFT marked this pull request as ready for review April 10, 2026 07:31
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dhartglassMSFT commented Apr 10, 2026
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src/coreclr/jit/hwintrinsiccodegenarm64.cpp
Comment on lines +2655 to +2656
int numInstrs = (targetReg != op1Reg) ? 2 : 1;
HWIntrinsicImmOpHelper helper(this, op2Reg, 0, 511, node, numInstrs);
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Tomorrow I'll open a workitem to refactor this pattern into HWIntrinsicImmOpHelper somehow, since this pattern or something pretty similar now appears a number of times in this file

@build-analysis build-analysis bot mentioned this pull request Apr 10, 2026
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