UPSTREAM: arm64: dts: qcom: hamoa/purwa: Flatten usb controller nodes#1036
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Kriskura176767 wants to merge 43 commits intoqualcomm-linux:tech/all/dt/hamoafrom
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UPSTREAM: arm64: dts: qcom: hamoa/purwa: Flatten usb controller nodes#1036Kriskura176767 wants to merge 43 commits intoqualcomm-linux:tech/all/dt/hamoafrom
Kriskura176767 wants to merge 43 commits intoqualcomm-linux:tech/all/dt/hamoafrom
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… block The APSS debug block is built with CoreSight devices like ETM, replicator, funnel and TMC ETF. Add dt nodes for these devices to enable ETM trace. Link: https://lore.kernel.org/all/20251218-cpu_cluster_component_pm-v2-12-2335a6ae62a0@oss.qualcomm.com/ Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Co-developed-by: Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com> Signed-off-by: Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
Embedded Trace Router(ETR) is working as a DDR memory sink to collect tracing data from source device. The CTCU serves as the control unit for the ETR device, managing its behavior to determine how trace data is collected. Link: https://lore.kernel.org/all/20260204-enable-ctcu-and-etr-v3-2-0bb95c590ae1@oss.qualcomm.com/ Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Document the device tree bindings for the PURWA-IOT-EVK board, which uses the Qualcomm X1P42100 SoC. Link: https://lore.kernel.org/all/20260202073555.1345260-1-yijie.yang@oss.qualcomm.com/ Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
Add the Purwa-IoT-EVK board to the list to enable access to EFI variables. Guarantee that subsystems relying on SCM services can access secure-world features. This change improves reliability and prevents missing functionality or boot-time issues by making service availability explicit. Link: https://lore.kernel.org/all/20260202073555.1345260-2-yijie.yang@oss.qualcomm.com/ Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
The PURWA-IOT-SOM is a compact computing module that integrates a System on Chip (SoC) — specifically the x1p42100 — along with essential components optimized for IoT applications. It is designed to be mounted on carrier boards, enabling the development of complete embedded systems. Purwa uses a slightly different Iris HW revision (8.1.2 on Hamoa, 8.1.11 on Purwa). Support will be added later. Make the following peripherals on the SOM enabled: - Regulators on the SOM - Reserved memory regions - PCIe3, PCIe4, PCIe5, PCIe6a - USB0 through USB6 and their PHYs - ADSP, CDSP - Graphic Link: https://lore.kernel.org/all/20260202073555.1345260-3-yijie.yang@oss.qualcomm.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
The PURWA-IOT-EVK is an evaluation platform for IoT products, composed of the Purwa IoT SoM and a carrier board. Together, they form a complete embedded system capable of booting to UART. PURWA-IOT-EVK uses the PS8833 as a retimer for USB0, unlike HAMOA-IOT-EVK. Meanwhile, USB0 bypasses the SBU selector FSUSB42. Make the following peripherals on the carrier board enabled: - UART - On-board regulators - USB Type-C mux - Pinctrl - Embedded USB (EUSB) repeaters - NVMe - pmic-glink - USB DisplayPorts - Bluetooth - WLAN - Audio - PCIe ports for PCIe3 through PCIe6a - TPM Link: https://lore.kernel.org/all/20260202073555.1345260-4-yijie.yang@oss.qualcomm.com/ Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
Add UFS host controller and PHY nodes for x1e80100 SoC. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260211132926.3716716-1-pradeep.pragallapati@oss.qualcomm.com
Enable UFS for HAMOA-IOT-EVK board. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260211132926.3716716-1-pradeep.pragallapati@oss.qualcomm.com
…t evk board Enable SD Card host controller for hamoa iot evk board. Link: https://lore.kernel.org/all/20260211093045.2595126-1-sarthak.garg@oss.qualcomm.com/ Signed-off-by: Sarthak Garg <sarthak.garg@oss.qualcomm.com> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
Add DAI links for DP0 and DP1 playback and set sound-name-prefix for both DisplayPort endpoints in the hamoa-evk DTS. Link: https://lore.kernel.org/all/20260209091139.622756-1-le.qi@oss.qualcomm.com/ Signed-off-by: Le Qi <le.qi@oss.qualcomm.com> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Add the CAMCC block for x1e80100. The x1e80100 CAMCC block is an iteration of previous CAMCC blocks with the exception of having two required power-domains not just one. Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260128-purwa-videocc-camcc-v1-6-b23de57df5ba@oss.qualcomm.com
…odes on purwa Update the compatible for videocc and camcc nodes to match with their respective purwa(X1P42100) specific drivers. Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260128-purwa-videocc-camcc-v1-7-b23de57df5ba@oss.qualcomm.com
Enable passive cooling for CPUs in the X1E80100 SoC by adding the '#cooling-cells' property. This will allow the OS to mitigate the CPU power dissipation with the help of SCMI DVFS. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Tested-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260210070321.17033-1-manivannan.sadhasivam@oss.qualcomm.com
Add support for SYSTEM_RESET2 vendor-specific resets as reboot-modes in the psci node. Describe the resets: "bootloader" will cause device to reboot and stop in the bootloader's fastboot mode. "edl" will cause device to reboot into "emergency download mode", which permits loading images via the Firehose protocol. Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260226054113.4156874-1-xin.liu@oss.qualcomm.com/
Add support for building an EL2 combined DTB for the hamoa-evk in the Qualcomm DTS Makefile. The new hamoa-iot-evk-el2.dtb is generated by combining the base hamoa-iot-evk.dtb with the x1-el2.dtbo overlay, enabling EL2-specific configurations required by the platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260127062425.1084673-1-xin.liu@oss.qualcomm.com/
…e trees All the existing variants Hamoa boards are using Gunyah hypervisor which means that, so far, Linux-based OS could only boot in EL1 on those devices. However, it is possible for us to boot Linux at EL2 on these devices [1]. When running under Gunyah, the remote processor firmware IOMMU streams are controlled by Gunyah. However, without Gunyah, the IOMMU is managed by the consumer of this DeviceTree. Therefore, describe the firmware streams for each remote processor. Add remoteproc IOMMUS to the EL2 device trees to generate the corresponding -el2.dtb files. [1] https://docs.qualcomm.com/bundle/publicresource/topics/80-70020-4/boot-developer-touchpoints.html#uefi Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260203063244.1498699-1-xin.liu@oss.qualcomm.com/
Add in two CCI buses. One bus has two CCI bus master pinouts: cci_i2c_sda0 = gpio101 cci_i2c_scl0 = gpio102 cci_i2c_sda1 = gpio103 cci_i2c_scl1 = gpio104 The second bus has two CCI bus master pinouts: cci_i2c_sda2 = gpio105 cci_i2c_scl2 = gpio106 aon_cci_i2c_sda3 = gpio235 aon_cci_i2c_scl3 = gpio236 Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-2-1d5a9306116a@linaro.org/ Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Add dtsi to describe the xe180100 CAMSS block 4 x CSIPHY 3 x TPG 2 x CSID 2 x CSID Lite 2 x IFE 2 x IFE Lite Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-3-1d5a9306116a@linaro.org/ Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
…gulators Add pmic,id = m rpmh to regulator definitions. This regulator set provides vreg_l3m_1p8 the regulator for the ov08x40 RGB sensor on the CRD. Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-4-1d5a9306116a@linaro.org/ Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
…SIPHY4 Define ov08x40 on cci1_i2c1. The RGB sensor appears on the AON CCI pins connected to CSIPHY4 in four lane mode. Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-5-1d5a9306116a@linaro.org/ Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
…h voltage levels for IR and RGB camera Add the PM8010 PMIC providing the following voltage rails: vreg_l1m_r @ 1v2 IR sensor vreg_l2m_r @ 1v2 RGB sensor vreg_l3m_r @ 1v8 IR sensor vreg_l4m_r @ 1v8 RGB sensor vreg_l5m_r @ 2v8 IR sensor vreg_l7m_r @ 2v8 RGB sensor Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-6-1d5a9306116a@linaro.org/ Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
…on CSIPHY4 Switch on the ov02c10 RGB sensor on CSIPHY4. Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-7-1d5a9306116a@linaro.org/ Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
…amera PMIC with voltage levels for IR and RGB camera Add voltage regulators-8 for Camera on slim7x including: - vreg_l1m_1p2 - vreg_l3m_1p8 Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-8-1d5a9306116a@linaro.org/ Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
…voltage regulator for RGB camera Some sleuthing work by Aleksandrs Vinarskis in the bowels of the ACPI tables for this part shows we need l7b_2p8 for the avdd supply. Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-9-1d5a9306116a@linaro.org/ Suggested-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
…RGB sensor on CSIPHY4 Add in the RGB sensor on CSIPHY4. Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-10-1d5a9306116a@linaro.org/ Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
…CAMSS RGB sensor Inspiron14 has a ov02e10 sensor on CSIPHY4. Enable the list of dependencies now. Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-11-1d5a9306116a@linaro.org/ Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Add pm8010 L4M regulator which is used by Camera I2C pull-up. Signed-off-by: Tingguo Cheng <tingguo.cheng@oss.qualcomm.com> Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260227-hamoa_evk-v1-1-36f895a24d8f@oss.qualcomm.com/
Enable IMX577 via CCI on Hamoa EVK Core Kit. The Hamoa EVK board does not include a camera sensor by default, this DTSO has enabled the Arducam 12.3MP IMX577 Mini Camera Module on the CSI-1 interface. Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260227-hamoa_evk-v1-2-36f895a24d8f@oss.qualcomm.com/
…configuration Hamoa IOT boards support a different thermal junction temperature specification compared to the base Hamoa platform due to package level differences. Update the passive trip thresholds to 105°C to align with the higher temperature specification. Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/linux-devicetree/20260302-higher_tj-v1-1-4c0d288f8e7f@oss.qualcomm.com/
Enable UFS for purwa-iot-evk board. This patch depends on [PATCH V5 2/3] arm64: dts: qcom: hamoa: Add UFS nodes for x1e80100 SoC https://lore.kernel.org/all/20260211132926.3716716-3-pradeep.pragallapati@oss.qualcomm.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260323-purwa-ufs-v2-1-58fb2c168786@oss.qualcomm.com/ Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
…t evk board Enable SD Card host controller for purwa iot evk board. Signed-off-by: Sarthak Garg <sarthak.garg@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260323110017.2527956-1-sarthak.garg@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
…vice Interconnect from SCM device are optional and were added to get additional performance benefit. These nodes however delays the SCM firmware device probe due to dependency on interconnect and results in NULL pointer dereference for the users of SCM device driver APIs, such as PDC driver. Remove them from the scm device to unblock the user. Link: https://lore.kernel.org/r/20260312-hamoa_pdc-v1-1-760c8593ce50@oss.qualcomm.com Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Add deepest idle state along with pdc config reg to make GPIO IRQs work as wakeup capable interrupts in deepest idle state. Add QMP handle to allow PDC device to place a SoC level low power mode restriction. Link: https://lore.kernel.org/r/20260312-hamoa_pdc-v1-4-760c8593ce50@oss.qualcomm.com Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Purwa shares the Hamoa (X1E80100) PDC device, but the hardware register bug addressed in commit e9a48ea ("irqchip/qcom-pdc: Workaround hardware register bug on X1E80100") is already fixed in Purwa silicon. Hamoa compatible forces the software workaround. Use the Purwa specific compatible string for the PDC node to remove the workaround from Purwa. Fixes: f08edb5 ("arm64: dts: qcom: Add X1P42100 SoC and CRD") Link: https://lore.kernel.org/r/20251231-purwa_pdc-v1-2-2b4979dd88ad@oss.qualcomm.com Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Purwa's GPU does not support SID 1, which is typically used for LPAC-related traffic. Remove SID 1 from the GPU node's iommus property to accurately describe the hardware. This fixes the splat below, seen with some versions of Gunyah hypervisor: Internal error: synchronous external abort: 0000000096000010 [qualcomm-linux#1] SMP CPU: 0 UID: 0 PID: 80 Comm: kworker/u33:2 Tainted: G M Tainted: [M]=MACHINE_CHECK Hardware name: Qualcomm Technologies, Inc. Purwa IoT EVK (DT) Workqueue: events_unbound deferred_probe_work_func pstate: 21400005 (nzCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--) pc : arm_smmu_write_s2cr+0x9c/0xbc lr : arm_smmu_master_install_s2crs+0x78/0xa4 sp : ffff80008039b570 x29: ffff80008039b570 x28: 0000000000000000 x27: ffffaddd62f1ab78 x26: ffff00080a4ff280 x25: 0000000000000018 x24: ffff00080b896480 x23: ffff00080ba9b7a0 x22: ffff00080bb05160 x21: 0000000000000000 x20: 0000000000000000 x19: 0000000000000001 x18: 00000000ffffffff x17: 0000000000000000 x16: 0000000000000000 x15: ffff80008039b1d0 x14: ffff80010039b37d x13: 00746c7561662d74 x12: 0000000000000000 x11: ffff00080b7fbd98 x10: ffffffffffffffc0 x9 : ffffffffffffffff x8 : 0000000000000228 x7 : 0000000000000e87 x6 : 0000000000000000 x5 : 0000000000000000 x4 : ffff00080a4ff280 x3 : 0000000000000000 x2 : ffff800082a40c04 x1 : 0000000000000000 x0 : ffff800082a40000 Call trace: arm_smmu_write_s2cr+0x9c/0xbc (P) arm_smmu_master_install_s2crs+0x78/0xa4 arm_smmu_attach_dev+0xb0/0x1d8 __iommu_device_set_domain+0x84/0x11c __iommu_group_set_domain_internal+0x60/0x120 __iommu_attach_group+0x88/0x9c iommu_attach_device+0x6c/0xa0 msm_iommu_new.part.0+0x84/0xe4 [msm] msm_iommu_gpu_new+0x3c/0x104 [msm] adreno_iommu_create_vm+0x24/0xc8 [msm] a6xx_create_vm+0x48/0x78 [msm] msm_gpu_init+0x2d8/0x508 [msm] adreno_gpu_init+0x208/0x324 [msm] a6xx_gpu_init+0x604/0x8cc [msm] adreno_bind+0xb4/0x124 [msm] component_bind_all+0x114/0x23c msm_drm_init+0x1b0/0x1ec [msm] msm_drm_bind+0x30/0x3c [msm] try_to_bring_up_aggregate_device+0x164/0x1d0 __component_add+0xa4/0x16c component_add+0x14/0x20 msm_dp_display_probe_tail+0x4c/0xac [msm] msm_dp_auxbus_done_probe+0x14/0x20 [msm] dp_aux_ep_probe+0x4c/0xf4 [drm_dp_aux_bus] really_probe+0xbc/0x29c __driver_probe_device+0x78/0x12c driver_probe_device+0x3c/0x15c __device_attach_driver+0xb8/0x134 bus_for_each_drv+0x88/0xe8 __device_attach+0xa0/0x190 device_initial_probe+0x50/0x54 bus_probe_device+0x38/0xa4 deferred_probe_work_func+0x88/0xc0 process_one_work+0x148/0x28c worker_thread+0x2cc/0x3d4 kthread+0x12c/0x204 ret_from_fork+0x10/0x20 ---[ end trace 0000000000000000 ]--- Fixes: 1aa0b4e ("arm64: dts: qcom: x1p42100: Add GPU support") Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260410-purwa-gpu-dt-fix-v1-1-4637892156cf@oss.qualcomm.com
Switch the iris video codec node in hamoa from the legacy 'iommus' property to 'iommu-map', using IRIS_NON_PIXEL_VCODEC and IRIS_PIXEL function IDs to identify the non-pixel and pixel context bank SMMU stream mappings respectively. Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>
Add node for the X1P42100 camera subsystem. Link: https://lore.kernel.org/all/20260410-purwa_camss-v1-3-eedcf6d9d8ee@oss.qualcomm.com/ Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
enable camss node for purwa iot evk board camss tpg support. Link: https://lore.kernel.org/all/20260410-purwa_camss-v1-4-eedcf6d9d8ee@oss.qualcomm.com/ Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Add embedded controller node for Hamoa/Purwa CRDs which adds fan control, temperature sensors, access to EC internal state changes and suspend entry/exit notifications to the EC. Link: https://lore.kernel.org/lkml/20260313-v04-add-driver-for-ec-v4-4-ca9d0efd62aa@oss.qualcomm.com/ Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>
Add embedded controller node for Hamoa IOT EVK boards which adds fan control, temperature sensors, access to EC internal state changes and suspend entry/exit notifications to the EC. Link: https://lore.kernel.org/lkml/20260313-v04-add-driver-for-ec-v4-5-ca9d0efd62aa@oss.qualcomm.com/ Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>
… points The Iris block on X1P differs from SM8550/X1E in its clock configuration and requires a dedicated OPP table. The node inherited from the X1E cannot be reused directly, and the fallback compatible "qcom,sm8550-iris" cannot be applied. Override the inherited clocks, clock-names, and operating points, and replaces them with the X1P42100-specific definitions. A new OPP table is provided to support the correct performance levels on this platform. Link: https://lore.kernel.org/linux-arm-msm/20260401-enable_iris_on_purwa-v4-4-ca784552a3e9@oss.qualcomm.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Enable video nodes on the purwa-iot-som board. Link: https://lore.kernel.org/linux-arm-msm/20260401-enable_iris_on_purwa-v4-5-ca784552a3e9@oss.qualcomm.com/ Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Flatten usb controller nodes and update to using latest bindings and flattened driver approach. Tested this patch on CRD platform. For testing purpose, modified dr_mode property and added usb-role-switch property to the 3 super speed capable DRD controllers and valdiated both host and device mode. Also validated host mode on the multiport controller. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260323103119.1801139-1-krishna.kurapati@oss.qualcomm.com/
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