Add the kaanpali nodes for trng#1060
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kkartik-qcom wants to merge 29 commits intoqualcomm-linux:tech/all/dt/kaanapalifrom
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Add the kaanpali nodes for trng#1060kkartik-qcom wants to merge 29 commits intoqualcomm-linux:tech/all/dt/kaanapalifrom
kkartik-qcom wants to merge 29 commits intoqualcomm-linux:tech/all/dt/kaanapalifrom
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Document compatible for Qualcomm Kaanapali SoC ADSP PAS which looks fully
compatible with SM8750, which can fallback to SM8550 except for one more
interrupt ("shutdown-ack").
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20260114-knp-remoteproc-v4-1-fcf0b04d01af@oss.qualcomm.com/
Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
Add remote processor PAS loader for Kaanapali CDSP processor, compatible with earlier SM8550 with minor difference: one more sixth "shutdown-ack" interrupt. It is not compatible with SM8650 because one memory region "global_sync_mem" is not managed by kernel on Kaanapali so it is removed in the remoteproc cdsp node. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260114-knp-remoteproc-v4-2-fcf0b04d01af@oss.qualcomm.com/ Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
Add CoreSight nodes to enable trace paths such as TPDM->ETF and STM->ETF. These devices are part of the AOSS, CDSP, QDSS, modem and some small subsystems, such as DCC, GCC, ipcc and so on. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260224-knp-dts-misc-v6-1-79d20dab8a60@oss.qualcomm.com/ Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
…rial engines Add device tree support for QUPv3 serial engine protocols on Kaanapali. Kaanapali has 24 QUP serial engines across 4 QUP wrappers, each with support of GPI DMA engines, and it also includes 5 I2C hubs. Signed-off-by: Jyothi Kumar Seerapu <jyothi.seerapu@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260224-knp-dts-misc-v6-2-79d20dab8a60@oss.qualcomm.com/ Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
The Kaanapali includes seven TSENS instances, with a total of 55 thermal sensors distributed across various locations on the SoC. The TSENS max/reset threshold is configured to 130°C in the hardware. Enable all TSENS instances, and define the thermal zones with a hot trip at 120°C and critical trip at 125°C. Signed-off-by: Manaf Meethalavalappu Pallikunhi <manaf.pallikunhi@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260224-knp-dts-misc-v6-3-79d20dab8a60@oss.qualcomm.com/ Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
…i SoC Add remoteproc PAS loader for ADSP and CDSP with its SMP2P and fastrpc nodes. Co-developed-by: Kumari Pallavi <kumari.pallavi@oss.qualcomm.com> Signed-off-by: Kumari Pallavi <kumari.pallavi@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260224-knp-dts-misc-v6-4-79d20dab8a60@oss.qualcomm.com/ Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Introduce audio support for Kaanapali SoC by adding LPASS macro codecs, TLMM pin controller and SoundWire controller with similar hardware implementation to SM8750 platform. Also add GPR (Generic Pack Router) node along with support for APM (Audio Process Manager) and PRM (Proxy Resource Manager) audio services. Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260224-knp-dts-misc-v6-5-79d20dab8a60@oss.qualcomm.com/ Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Enable ADSP and CDSP on Kaanapali MTP board. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260224-knp-dts-misc-v6-6-79d20dab8a60@oss.qualcomm.com/ Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Enable ADSP and CDSP on Kaanapali QRD board. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260224-knp-dts-misc-v6-7-79d20dab8a60@oss.qualcomm.com/ Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
…, WCD9395, DMIC) Add support for audio on the Kaanapali MTP platform by introducing device tree nodes for WSA8845 smart speaker amplifier for playback, DMIC microphone for capture, and sound card routing. The WCD9395 codec is add to supply MIC-BIAS, for enabling onboard microphone capture. Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260224-knp-dts-misc-v6-8-79d20dab8a60@oss.qualcomm.com/ Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
…ollers for Kaanapali Add the device nodes for the multimedia clock controllers (cambistmclkcc, camcc, dispcc, videocc, gpucc and gxclkctl). Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260224-knp-dts-misc-v6-9-79d20dab8a60@oss.qualcomm.com/ Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Add DT node for the kaanapali iris video node. Written with help from Taniya Das(added videocc node). Link: https://lore.kernel.org/all/20250924-knp-dts-v1-20-3fdbc4b9e1b1@oss.qualcomm.com/ Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
…for ice node Qualcomm in-line crypto engine (ICE) platform driver specifies and votes for it's own resources. Before accessing ICE hardware, the 'core' and 'iface' clocks must be turned on by the driver. This can only be done if the GCC_UFS_PHY_GDSC power domain is enabled. Specify both the GCC_UFS_PHY_GDSC power domain and 'core' and 'iface' clocks in the ICE node for kaanapali. Link: https://lore.kernel.org/all/20260123-qcom_ice_power_and_clk_vote-v1-2-e9059776f85c@qti.qualcomm.com/ Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
Add a spmi-pmic-arb device for the SPMI PMIC arbiter found on Kaanapali. It has two subnodes corresponding to the SPMI0 bus controller and the SPMI1 bus controller. Also add dtsi files for PMH0104, PMH0110, PMD8028, PMIH0108, PMR735D and PM8010 along with temp-alarm and GPIO nodes under them, which are needed on Kaanapali. Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260322-knp-pmic-dt-v1-1-70bc40ea4428@oss.qualcomm.com
Include PMIC files used on Kaanapali MTP boards. Add configurations for keys (volume up and volume down), RGB LEDs and flash LEDs. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260322-knp-pmic-dt-v1-2-70bc40ea4428@oss.qualcomm.com
Include PMIC files used on Kaanapali QRD boards. Add configurations for keys (volume up and volume down), RGB LEDs and flash LEDs. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260322-knp-pmic-dt-v1-3-70bc40ea4428@oss.qualcomm.com
Enable bluetooth WCN785x and Wi-Fi on Kaanapali MTP board. Co-developed-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Signed-off-by: Zijun Hu <zijun.hu@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260322-knp-pmic-dt-v1-4-70bc40ea4428@oss.qualcomm.com
Add MDSS/MDP/DSI controllers and DSI PHYs for Kaanapali. DP controllers are not included. Signed-off-by: Yuanjie Yang <yuanjie.yang@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260322-knp-pmic-dt-v1-5-70bc40ea4428@oss.qualcomm.com
Enable MDSS/DPU/DSI0 and add Novatek NT37801 panel on Kaanapali MTP board. NT37801 Spec V1.0 chapter "5.7.1 Power On Sequence" states VDDI ranges 1.65V~1.95V, but ldo12 ranges 1.2V~1.8V, so change ldo12 range to 1.65V~1.8V. pmh0110_d_e0_gpios and pmh0110_f_e0_gpios are configured for level shifters. Kaanapali need configure these pinctrl for panel function. Signed-off-by: Yuanjie Yang <yuanjie.yang@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260322-knp-pmic-dt-v1-6-70bc40ea4428@oss.qualcomm.com
During DPU runtime suspend, calling dev_pm_opp_set_rate(dev, 0) drops the MMCX rail to MIN_SVS while the core clock frequency remains at its original (highest) rate. When runtime resume re-enables the clock, this may result in a mismatch between the rail voltage and the clock rate. For example, in the DPU bind path, the sequence could be: cpu0: dev_sync_state -> rpmhpd_sync_state cpu1: dpu_kms_hw_init timeline 0 ------------------------------------------------> t After rpmhpd_sync_state, the voltage performance is no longer guaranteed to stay at the highest level. During dpu_kms_hw_init, calling dev_pm_opp_set_rate(dev, 0) drops the voltage, causing the MMCX rail to fall to MIN_SVS while the core clock is still at its maximum frequency. When the power is re-enabled, only the clock is enabled, leading to a situation where the MMCX rail is at MIN_SVS but the core clock is at its highest rate. In this state, the rail cannot sustain the clock rate, which may cause instability or system crash. Remove the call to dev_pm_opp_set_rate(dev, 0) from dpu_runtime_suspend to ensure the correct vote is restored when DPU resumes. Fixes: b0530eb ("drm/msm/dpu: Use OPP API to set clk/perf state") Signed-off-by: Yuanjie Yang <yuanjie.yang@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260309063720.13572-1-yuanjie.yang@oss.qualcomm.com/
Add the base USB devicetree definitions for Kaanapali platform. The overall chipset contains a single DWC3 USB3 controller (rev. 200a), SS QMP PHY (rev. v8) and M31 eUSB2 PHY. Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260329175249.2946508-2-krishna.kurapati@oss.qualcomm.com/ Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Enable USB support on Kaanapali MTP variant. Enable USB controller in device mode till glink node is added. Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260329175249.2946508-3-krishna.kurapati@oss.qualcomm.com/ Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Enable USB support on Kaanapali QRD variant. Enable USB controller in device mode till glink node is added. Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260329175249.2946508-4-krishna.kurapati@oss.qualcomm.com/ Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Add the Adreno GPU SMMU node for kaanapali platform. Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Add GPU and GMU devicetree nodes for the Adreno 840 GPU found on Qualcomm Kaanapali platform. Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Add the secure firmware name property and enable GPU support on Kaanapali QRD device. Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Add the secure firmware name property and enable GPU support on Kaanapali MTP device. Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Add cooling-cells property to the CPU nodes to support cpufreq cooling devices. Signed-off-by: Dipa Mantre <dipa.mantre@oss.qualcomm.com> Reviewed-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260415-cpufreq_kaanapali-v1-1-1fa94105d5c2@oss.qualcomm.com
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Add the kaanpali nodes for the True Random Number Generator (TRNG). Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/lkml/20260423-knp_rng-v1-1-9df6c0391a8f@oss.qualcomm.com/ Signed-off-by: Kumar Kartik <kkartik@qti.qualcomm.com>
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Add the kaanpali nodes for the True Random Number Generator (TRNG).
CRs-Fixed: 4520148