FROMLIST: arm64: dts: qcom: glymur: Enable LLCC/DDR/DDR_QOS dvfs#1082
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ppapaniy wants to merge 1 commit intoqualcomm-linux:tech/all/dt/glymurfrom
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FROMLIST: arm64: dts: qcom: glymur: Enable LLCC/DDR/DDR_QOS dvfs#1082ppapaniy wants to merge 1 commit intoqualcomm-linux:tech/all/dt/glymurfrom
ppapaniy wants to merge 1 commit intoqualcomm-linux:tech/all/dt/glymurfrom
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On Qualcomm Glymur SoCs, the memlat governor and the mechanism to control the LLCC and DDR/DDR_QOS is hosted on the CPU Control Processor (CPUCP). Enable the nodes required to get QCOM SCMI Generic Extension protocol to probe on Glymur and Mahua SoCs. Link: https://lore.kernel.org/lkml/20260507062237.78051-8-sibi.sankar@oss.qualcomm.com/ Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
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On Qualcomm Glymur SoCs, the memlat governor and the mechanism to control the LLCC and DDR/DDR_QOS is hosted on the CPU Control Processor (CPUCP). Enable the nodes required to get QCOM SCMI Generic Extension protocol to probe on Glymur and Mahua SoCs.
Link: https://lore.kernel.org/lkml/20260507062237.78051-8-sibi.sankar@oss.qualcomm.com/